PAS6371 Datasheet, PDF (8/20 Pages) Pixart Imaging Inc. – CMOS VGA DIGITAL IMAGE SENSOR

PixArt Imaging Inc.
PAS6371LT
CMOS Image Sensor IC
Data Transfer Format
Master transmits data to salve ( write cycle )
z S : Start.
z A : Acknowledge by salve.
z P : Stop.
z RW : The LSB of 1^ST byte to decide whether current cycle is read or write cycle. RW = 1 –
Read cycle, RW = 0 – Write cycle.
z SUBADDRESS : The address values of PAS6371LT internal control registers. ( Please refer
to PAS6371LT register description )
During write cycle, the master generates start condition and then places the 1^st byte data that are
combined slave address ( 7 bits ) with a read / write control bit to SDA line. After slave ( PAS6371LT )
issues acknowledgment, the master places 2^nd byte ( Sub Address ) data on SDA line. Again follow the
PAS6371LT acknowledgment, the master places the 8 bits data on SDA line and transmit to PAS6371LT
control register ( address was assigned by 2^nd byte ). After PAS6371LT issues acknowledgment, the
master can generate a stop condition to end of this write cycle. In the condition of multi-byte write, the
PAS6371LT sub-address is automatically increment after each DATA byte transferred. The data and A
cycles is repeat until last byte write. Every control registers value inside PAS6371LT can be programming
via this way.
Slave transmits data to master ( read cycle )
z The sub-address was taken from previous write cycle.
z The sub-address is automatically increment after each byte read.
z Am : Acknowledge by master.
z Note there is no acknowledgment from master after last byte read.
During read cycle, the master generates start condition and then place the 1^st byte data that are combined
slave address ( 7 bits ) with a read / write control bit to SDA line. After issue acknowledgment, 8 bits
DATA was also placed on SDA line by PAS6371LT. The 8 bits data was read from PAS6371LT internal
control register that address was assigned by previous write cycle. Follow the master acknowledgment,
the PAS6371LT place the next 8 bits data ( address is increment automatically ) on SDA line and then
transmit to master serially. The DATA and Am cycles is repeat until the last byte read. After last byte read,
Am is no longer generated by master but instead by keep SDA line high. The slave ( PAS6371LT ) must
releases SDA line to master to generate STOP condition.
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
PixArt Imaging Inc.
E-mail: [e-mail]
V1.1,
8
2008/04/09