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PAN301A Datasheet, PDF (16/24 Pages) List of Unclassifed Manufacturers – CMOS HIGH PERFORMANCE OPTICAL MOUSE SENSOR
PixArt Imaging Inc.
PAN301A
CMOS Optical Mouse Sensor
The PAN301A will not write to any register and will reset the serial port (but nothing else) and be
prepared for the beginning of future transmissions after PD goes low.
6.2.2 Firmware Flaws Error, or Others Error
The PAN301A and the micro-controller might get out of synchronization due to micro-controller
firmware flaws. The PD pin can stay high, with the PAN301A in the shutdown state, or the PD pin can be
lowered, returning the PAN301A to normal operation.
If the microprocessor and the PAN301A get out of sync, then the data either written or read from the
registers will be incorrect. In such a case, an easy way to solve this is to raise PD to re-sync the parts after
an incorrect read. The PAN301A will reset the serial port but will not reset the registers and be prepared
for the beginning of a new transmission.
6.2.3 Power On Problem
The problem occurs if the PAN301A powers up before the microprocessor sets the SCLK and SDIO lines
to be output.
6.2.4 ESD Events
The PAN301A and the micro-controller might get out of synchronization due to ESD events.
If the PAN301A and the micro-controller might get out of synchronization due to power on problem or
ESD events. An easy way to solve this is to soft reset the PAN301A.
VDD
PD
SCLK
1us,min
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SDIO
Hi-Z
ADDRESS(R/W)
DATA
Figure 13. Soft reset the PAN301A (Reset full chip and SDIO line set to Hi-Z state)
6.3 Collision Detection on SDIO
The only time that the PAN301A drives the SDIO line is during a READ operation. To avoid data
collisions, the micro-controller should release SDIO before the falling edge of SCLK after the last address
bit. The PAN301A begins to drive SDIO after the next falling edge of SCLK. The PAN301A release
SDIO of the rising SCLK edge after the last data bit. The micro-controller can begin driving SDIO any
time after that. In order to maintain low power consumption in normal operation or when the PD pin is
pulled high, the micro-controller should not leave SDIO floating until the next transmission (although that
will not cause any communication difficulties).
6.4 Serial Interface Watchdog Timer Timeout
When there are only two pins to read register from PAN301A, and PD pin can’t be used to re-
synchronous function. If the microprocessor and the PAN301A get out of sync, then the data either
written or read from the registers will be incorrect. In such a case, an easy way to solve this condition is to
toggle the SCLK line from high to low to high and wait at least tSIWTT to re-sync the parts after an
incorrect read. The PAN301A will reset the serial port but will not reset the registers and be prepared for
the beginning of a new transmission.
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PixArt Imaging Inc.
E-mail: fae_service@pixart.com.tw
V1.3, MAY. 2004