PAS302BCA-32 Datasheet, PDF (10/15 Pages) Pixart Imaging Inc. – CMOS VGA DIGITAL IMAGE SENSOR

PAS302BCA-32
CMOS Image Sensor IC
generated by master but instead of keeping SDA line as high. The slave (PAS302BCA-32) must
releases SDA line back to master to generate STOP condition. (Please refer to Figure 5.3.)
SDA
SCL
1-7
8
9
1-7
8
9
S
Start
Condition
Address
R/W
ACK
from
Data
ACK
from
Receiver
Receiver
Figure 5.3 Data Transfer Format
5.3. I²C^TM Bus Timing
1-7
8
Data
9
P
ACK Stop
from Condition
Receiver
SDA
tf
SCL
S
tLOW
tr
tf
tSU;DAT
tHD;STA
tHD;STA
tHD;DAT
tHIGH
tSU;STA
Sr
Figure 5.4 I²C^TM Bus Timing
tSP
tr
tBUF
tSU;STO
P
S
5.4. I²C^TM Bus Timing Specification
PARAMETER
SYMBOL
SCL clock frequency
Hold time (repeated) START condition.
After this period, the first clock pulse is
generated.
Low period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time. For I²C^TM bus device
Data set-up time
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Set-up time for STOP condition
Bus free time between a STOP and START
Capacitive load for each bus line
Noise margin at LOW level for each
connected device (including hysteresis)
fscl
tHD:STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
tr
tf
tSU;STO
tBUF
Cb
VnL
STANDARD-MODE
MIN.
10
4.0
MAX.
400
-
UNIT
kHz
µs
4.7
-
µs
0.75
-
µs
4.7
-
µs
0
3.45
µs
250
-
ns
30
N.D.(Note) ns
30
N.D. (Note) ns
4.0
-
µs
4.7
-
µs
1
15
pF
0.1 VDD
-
V
Version 2.3, 13 Sep. 2004
PixArt Imaging Inc.
10
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