P83C660X2 Datasheet, PDF (94/102 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family

Philips Semiconductors
80C51 8-bit microcontroller family 16 KB OTP/ROM, 512B
RAM, low voltage (2.7 to 5.5 V), low power, high speed (30/33
MHz), two 400KB I²C interfaces
Product data
P8xC660X2/661X2
Table 17. EPROM Programming Modes
MODE
Read signature
RST
1
PSEN
0
ALE/PROG EA/V_PP
1
1
P2.7
0
P2.6
0
P3.7
0
P3.6
0
P3.3
X
Program code data
Verify code data
1
0
1
0
0*
V_PP
1
0
1
1
X
1
1
0
0
1
1
X
Pgm encryption table
Pgm security bit 1
Pgm security bit 2
Pgm security bit 3
Program to 6-clock mode
Verify 6-clock⁴
1
0
1
0
1
0
1
0
1
0
1
0
0*
V_PP
1
0
1
0
X
0*
V_PP
1
1
1
1
X
0*
V_PP
1
1
0
0
X
0*
V_PP
0
1
0
1
X
0*
V_PP
0
0
1
0
0
1
1
e
0
0
1
1
Verify security bits⁵
1
0
1
1
e
0
1
0
X
NOTES:
1. ‘0’ = Valid LOW for that pin, ‘1’ = valid HIGH for that pin.
2. V_PP = 12.75 V ±0.25 V.
3. V_CC = 5 V±10% during programming and verification.
4. Bit is output on P0.4 (1 = 12x, 0 = 6x).
5. Security bit one is output on P0.7.
Security bit two is output on P0.6.
Security bit three is output on P0.3.
* ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V_PP is held at
12.75 V. Each programming pulse is LOW for 100 µs (±10 µs) and HIGH for a minimum of 10 µs.
Table 18. Program Security Bits for EPROM Devices
PROGRAM LOCK BITS^{1, 2}
SB1 SB2 SB3 PROTECTION DESCRIPTION
1
U
U
U No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
2
P
U
U MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
3
P
P
U Same as 2, also verify is disabled.
4
P
P
P Same as 3, external execution is disabled. Internal data RAM is not accessible.
NOTES:
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
2003 Oct 02
94