SA56606-XX Datasheet, PDF (9/12 Pages) NXP Semiconductors – CMOS system reset

Philips Semiconductors
CMOS system reset
Product data
SA56606-XX
Application information
V_DD
SUPPLY
V_DD
SA56606-XX ^VOUT
R_PU
CPU
RESET
V_SS
GND
SL01371
Figure 14. Conventional reset application.
The Power ON Reset Circuit shown in Figure 15 is an example of
how to obtain a stable reset condition upon power-up. If the power
supply voltage rises abruptly, the RESET may go HIGH momentarily
when V_DD is below the minimum operating voltage (0.95 V). To
overcome this, a resistor (R) is placed between positive supply and
the V_DD pin with a capacitor from the V_DD pin to ground.
V_DD
SUPPLY
GND
R
D
R_PU
CPU
SA56606-XX
V_DD
V_OUT
RESET
C
V_SS
SL01372
Figure 15. Power ON reset circuit.
R₁₁
V_SUPPLY
R₁₂
CURRENT CHANGES
A
V_DD
SA56606-XX
V_SS
R_PU
OUTPUT
SL01373
Figure 16. High impedance supply operating problems.
Significant voltage variations of V_DD may occur when the device is
operated from high impedance power sources. When the device
asserts or releases a reset, V_DD variations are produced as a result
of the voltage drop developed across R₁₁ due to the current
variations through the resistor R₁₁ (representing the supply
impedance). If the V_DD variations are large, such that they exceed
the Detection Hysteresis, the output of the device can oscillate from
a HIGH state to a LOW state. The user should avoid using high
impedance V_DD sources to prevent such situations.
2001 Jun 19
9