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74HC74N652 Datasheet, PDF (9/22 Pages) NXP Semiconductors – Dual D-type flip-flop with set and reset; positive edge-trigger | |||
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NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set and reset; positive edge-trigger
Table 8. Dynamic characteristics â¦continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 9.
Symbol Parameter Conditions
Tamb = ï40 ï°C to +85 ï°C
Tamb = ï40 ï°C to +125 ï°C Unit
Min
Typ[1]
Max
Min
Max
th
hold time nD to nCP; see Figure 7
VCC = 4.5 V
3
ï3
-
3
-
ns
fmax
maximum nCP; see Figure 7
frequency
VCC = 4.5 V
22
54
-
18
-
MHz
VCC = 5 V; CL = 15 pF
-
59
-
-
CPD
power
CL = 50 pF; f = 1 MHz;
[4]
-
29
-
-
dissipation VI = GND to VCC - 1.5 V
capacitance
-
MHz
-
pF
[1] All typical values are measured at Tamb = 25 ï°C.
[2] tpd is the same as tPLH and tPHL.
[3] tt is the same as tTHL and tTLH.
[4] CPD is used to determine the dynamic power dissipation (PD in ïW).
PD = CPD ï´ VCC2 ï´ fi ï´ N + ï¥(CL ï´ VCC2 ï´ fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
ï¥(CL ï´ VCC2 ï´ fo) = sum of outputs.
74HC_HCT74
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 â 27 August 2012
© NXP B.V. 2012. All rights reserved.
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