74HC297 Datasheet, PDF (9/12 Pages) NXP Semiconductors – Digital phase-locked-loop filter

Philips Semiconductors
Digital phase-locked-loop filter
Product specification
74HC/HCT297
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard/bus driver
I_CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
min.
+25
typ.
max.
74HC
−40 to +85
min. max.
−40 to +125
min. max.
UNIT
V_CC ^WAVEFORMS
(V)
t_PHL/ t_PLH propagation delay
I/D_CP to I/D_OUT
50 175
220
18 35
44
14 30
37
t_PHL/ t_PLH
propagation delay
φA₁, φB
to XORPD_OUT
44 160
200
16 32
40
13 27
34
t_PHL/ t_PLH
propagation delay
φB, φA₂
to ECPD_OUT
61 220
275
22 44
55
18 37
47
t_THL/ t_TLH output transition time:
14 60
75
bus driver output;
5 12
15
I/D_OUT (pin 7)
4 10
13
t_THL/ t_TLH output transition time:
19 75
95
standard outputs;
7 15
19
XORPD_OUT, ECPD_OUT
6 13
16
(pins 11, 12)
265 ns
53
45
240 ns
48
41
330 ns
66
56
90 ns
18
15
110 ns
22
19
2.0 Fig.11
4.5
6.0
2.0 Fig.12
4.5
6.0
2.0 Fig.13
4.5
6.0
2.0 Fig.11
4.5
6.0
2.0 Fig.12 and 13
4.5
6.0
t_W
clock pulse width
80 22
K_CP
16 8
14 6
t_W
clock pulse width
100 28
I/D_CP
20 10
17 8
100
120
20
24
17
20
125
150
25
30
21
26
ns 2.0 Fig.14
4.5
6.0
ns 2.0 Fig.11
4.5
6.0
t_su
set-up time
120 33
D/U, EN_CTR to K_CP
24 12
20 10
t_h
hold time
0 −19
D/U, EN_CTR to K_CP
0 −7
0 −6
f_max
maximum clock pulse 6.0 19
frequency K_CP
30 57
35 68
150
180
30
36
26
31
0
0
0
0
0
0
4.8
4.0
24
20
28
24
ns 2.0 Fig.14
4.5
6.0
ns 2.0 Fig.14
4.5
6.0
MHz 2.0 Fig.14
4.5
6.0
f_max
maximum clock pulse 4.0 12
frequency I/D_CP
20 37
24 44
3.2
2.6
16
13
19
15
MHz 2.0 Fig.11
4.5
6.0
September 1993
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