 English |
|
|
|
|
|
|
|
| 74AHC_AHCT2G125_15 Datasheet, PDF (9/16 Pages) NXP Semiconductors – Dual buffer/line driver; 3-state | |||
| |||
| ◁ |
NXP Semiconductors
74AHC2G125; 74AHCT2G125
Dual buffer/line driver; 3-state
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Fig 8.
Test data is given in Table 10.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Test circuit for measuring switching times
Table 10. Test data
Type
Input
VI
74AHC2G125
VCC
74AHCT2G125 3 V
tr, tf
ï£ 3 ns
ï£ 3 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 kï
1 kï
S1 position
tPHL, tPLH
open
open
tPZH, tPHZ
GND
GND
tPZL, tPLZ
VCC
VCC
74AHC_AHCT2G125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 â 6 May 2013
© NXP B.V. 2013. All rights reserved.
9 of 16
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese