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TDA8787 Datasheet, PDF (8/20 Pages) NXP Semiconductors – 10-bit, 3.0 V analog-to-digital interface for CCD cameras | |||
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Philips Semiconductors
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
Preliminary speciï¬cation
TDA8787
SYMBOL
PARAMETER
CONDITIONS
Correlated Double Sampling (CDS)
Vi(CDS)(p-p)
maximum peak-to-peak
CDS input amplitude
(video signal)
VCC = 2.85 V
VCC ⥠3.0 V
Vreset(max)
maximum CDS input reset
pulse amplitude
Ii(IN)
input current into pin IN at ï¬oating gate level
(pin 4)
tCDS(min)
CDS control pulses
minimum active time
video input = Vi(CDS)(p-p);
2 LSB error at ADC output
th(IN-SHP)
CDS input hold time
(pin IN) compared to
control pulse SHP
VCCA = VCCD = 30 V;
Tamb = 25 °C; see Fig.9
th(IN-SHD)
CDS input hold time
(pin IN) compared to
control pulse SHD
VCCA = VCCD = 30 V;
Tamb = 25 °C; see Fig.9
Ampliï¬er
DRAGC
âGAGC
AGC dynamic range
maximum AGC gain step
Analog-to-Digital Converter (ADC)
LEi
integral linearity error
fpix = 18 MHz; ramp input
LEd
differential linearity error fpix = 18 MHz; ramp input
Total chain characteristics (CDS + AGC + ADC)
fpix(max)
tCLKH
tCLKL
td(SHD-CLK)
maximum pixel frequency
CLK pulse width HIGH
CLK pulse width LOW
time delay between
SHD and CLK
see Fig.9
tsu(PBK-CLK) set-up time of PBK
compared to CLK
Vi(IN)
video input dynamic signal AGC code = 00
for ADC full-scale output AGC code = 383
Ntot(rms)
total output noise (RMS
value)
see Fig.8
AGC gain = 0 dB
AGC gain = 9 dB
OCCD(max)
maximum offset between
CCD ï¬oating level and
CCD dark pixel level
Vn(i)(eq)(rms) equivalent input noise
voltage (RMS value)
MIN.
650
800
500
â1
11
3
3
â
â0.3
â
â
18
15
15
10
10
800
12.7
â
â
â70
â
TYP.
â
â
â
â
15
5
5
36
â
±1.3
±0.5
â
â
â
â
â
â
â
0.25
0.8
â
110
MAX. UNIT
â
mV
â
mV
â
mV
+1
µA
â
ns
7
ns
7
ns
â
dB
+0.3 dB
±2.5 LSB
±0.9 LSB
â
MHz
â
ns
â
ns
â
ns
â
ns
â
mV
â
mV
â
LSB
â
LSB
+70 mV
â
µV
1998 Oct 15
8
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