TDA8784 Datasheet, PDF (8/28 Pages) NXP Semiconductors – 18 Msps, 10-bit analog-to-digital interface for CCD cameras

Philips Semiconductors
18 Msps, 10-bit analog-to-digital
interface for CCD cameras
Product specification
TDA8784
CHARACTERISTICS
V_CCA = V_CCD = 5 V; V_CCO = 3 V; f_CLK = 18 MHz; T_amb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
Supplies
V_CCA
V_CCD
V_CCO
I_CCA
I_CCD
I_CCO
analog supply voltage
4.75
digital supply voltage
4.75
digital outputs supply voltage
2.5
analog supply current
−
digital supply current
−
digital outputs supply current C_L = 20 pF on all data outputs; −
ramp input
Digital inputs
CLOCK INPUT: CLK (REFERENCED TO DGND)
V_IL
LOW-level input voltage
0
V_IH
HIGH-level input voltage
2.0
I_IL
LOW-level input current
V_CLK = 0.8 V
−1
I_IH
HIGH-level input current
V_CLK = 2.0 V
−
Z_i
input impedance
f_CLK = 18 MHz
−
C_i
input capacitance
f_CLK = 18 MHz
−
INPUTS: SHP AND SHD
V_IL
LOW-level input voltage
0
V_IH
HIGH-level input voltage
2.0
I_IL
LOW-level input current
V_IL = 0.6 V
−
I_IH
HIGH-level input current
V_IH = 2.2 V
−
INPUTS: SEN, SCLK, SDATA, OE, STDBY, CLPDM, CLPOB AND CLPADC
V_IL
LOW-level input voltage
0
V_IH
HIGH-level input voltage
2.0
I_i
input current
−2
Correlated Double Sampling (CDS)
V_i(CDS)(p-p) CDS input amplitude
−
(peak-to-peak value)
I_{CPCDS,INP,IND} input current pins 8, 46
−2
and 47
t_CDS(min)
CDS control pulses minimum f_i(CDS1,2) = f_CLK(pix);
12
active time
V_i(CDS) = 1200 mV (p-p)
black-to-white transition in
1 pixel (±1 LSB typ.);
f_cut(CDS) = 40 MHz;
f_cut(AGC) = 40 MHz
t_hd1
hold time INP compared to see Fig.5
−
control pulse SHP
TYP. MAX. UNIT
5
5.25 V
5
5.25 V
3
5.25 V
78
85
mA
18
20
mA
1
−
mA
−
0.8 V
−
V_CCD V
−
+1
µA
−
20
µA
46
−
kΩ
1
−
pF
−
0.8 V
−
V_CCD V
−6
−
µA
0
−
µA
−
0.8 V
−
V_CCD V
−
+2
µA
400 1200 mV
−
+2
µA
−
−
ns
1
−
ns
1999 Sep 21
8