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TDA8772 Datasheet, PDF (8/20 Pages) NXP Semiconductors – Triple 8-bit video digital-to-analog converter
Philips Semiconductors
Triple 8-bit video digital-to-analog
converter
Product specification
TDA8772
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Voltage reference (pin 34, referenced to VSSA)
Vref
output reference voltage
Outputs
1.180
1.242 1.305
V
OUTB, OUTR, OUTG ANALOG OUTPUTS (PINS 36, 44 AND 40, REFERENCED TO VSSA) RL = 75 Ω; SEE TABLES 1 AND 2
FSR
full-scale output voltage range
0.9
1.0
1.1
V
Vos
offset of analog voltage output
0.75
0.83
0.95
V
VOUTmax maximum output voltage
data inputs = logic 1;
1.65
1.83
2.05
V
note 2
VOUTmin minimum output voltage
THD
total harmonic distortion
ZL
output load impedance
data inputs = logic 0;
0.75
0.83
0.95
V
note 2
fi = 4.43 MHz;
fclk = 35 MHz
fi = 4.43 MHz;
fclk = 85 MHz
−
−45
−
dB
−
−43
−
dB
60
75
90
Ω
Transfer function
INL
DNL
αCT
m
integral non-linearity
differential non-linearity
crosstalk DAC to DAC
DAC to DAC matching
fclk = 35 MHz; ramp input −
fclk = 85 MHz; ramp input −
fclk = 35 MHz; ramp input −
fclk = 85 MHz; ramp input -
−45
−
±0.5
±1
LSB
±0.75 ±1.2
LSB
±0.25 ±0.5
LSB
±0.5
±0.75
LSB
−
−
dB
1.0
2.0
%
Switching characteristics (RL = 75 Ω); see Fig.4
td
input to 50% output delay time full-scale change
−
10
−
ns
ts1
settling time
10% to 90% full-scale −
6
−
ns
change
ts2
settling time
to ±1 LSB
−
30
−
ns
Output transients (glitches)
Vg
area for 1 LSB change
−
1
−
LSB.ns
Notes
1. Minimum and maximum data of current and power consumption are measured in worse case conditions: for
minimum data, all digital inputs are at logic level 0 while for maximum data, all digital inputs are at logic level 1.
2. VOUT is directly proportional to Vref.
1997 Mar 06
8