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TDA1313 Datasheet, PDF (8/15 Pages) NXP Semiconductors – Stereo continuous calibration DAC CC-DAC
Philips Semiconductors
Stereo continuous calibration DAC
(CC-DAC)
Objective specification
TDA1313; TDA1313T
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP.
Analog outputs; pins VOL and VOR
VFS
full-scale voltage
3.8
TCFS
full-scale temperature
−
coefficient
RL
load resistance
3
CL
load capacitance
−
VREF
reference output voltage
3.16
VDC
output DC voltage
2.25
(THD+N)/S total harmonic distortion plus at 0 dB signal level; note 2 −
noise
−
at 0 dB signal level; see
−
Fig.8
−
at −60 dB signal level;
−
note 2
−
at −60 dB signal level;
−
A-weighted; note 2
−
at 0 dB signal level;
−
f = 20 Hz to 20 kHz
−
tcs
current settling time to ±1
−
LSB
α
channel separation
86
see Fig.8
−
δIO
td
S/N
unbalance between outputs
time delay between outputs
signal-to-noise ratio at
bipolar zero
note 2
−
−
A-weighted; at code 0000H 93
4.2
±400
−
−
3.33
2.5
−88
0.004
−70
0.03
−36
1.6
−38
1.3
−84
0.006
0.2
95
70
0.2
±0.2
98
Notes
1. Vripple = 1% of the supply voltage; fripple = 100 Hz.
2. Measured with 1 kHz sinewave generated at a sampling rate of 384 kHz.
MAX.
4.6
−
−
200
3.5
2.75
−81
0.009
−
−
−28
4.0
−
−
−70
0.03
−
−
−
0.3
−
−
UNIT
V
ppm
kΩ
pF
V
V
dB
%
dB
%
dB
%
dB
%
dB
%
µs
dB
dB
dB
µs
dB
QUALITY SPECIFICATION
In accordance with UZW-BO/FQ-0601.
July 1993
8