SA57005 Datasheet, PDF (8/12 Pages) NXP Semiconductors – Multiple output low noise, low dropout linear regulator

Philips Semiconductors
Multiple output low noise, low dropout linear regulator
Product data
SA57005
APPLICATION INFORMATION
For good performance, the following points must be considered:
Input capacitor
An input capacitor of ≥1 µF is required between the SA57005 input
and the ground (the amount of capacitance may be increased
without limit).
This capacitor must be located as close as possible to V_IN or GND
pin (not more than 1 cm) and returned to a clean analog ground.
Any good quality ceramic, tantalum or film capacitor will work.
Output capacitor
Phase compensation is made for securing stable operation even if
the load current varies. For this reason, an output capacitor with
good frequency characteristics is needed at each of the three
outputs. Set it as close to the circuit as possible and make the wiring
as short as possible.
The value of the output capacitance has to be at least 1µF. Also it
must have the ESR (Equivalent Series Resistance) value within the
stable range shown Figure 8.
PS (Chip Enable) pins
These active-HIGH ON/OFF pins must be actively terminated. If the
function is not to be used, the corresponding PS pin should be tied
to V_IN. PS1 (pin 1) controls V_o1 while PS2/3 (pin 2) controls V_o2 and
V_o3 simultaneously. In other words V_o2 and V_o3 are always in the
same state, either both active or both inactive depending on the
input of PS2/3.
Line impedance of V_IN and GND
The V_IN and GND lines should be sufficiently wide. Otherwise when
the impedance of these lines is high, there is a chance to pick-up
noise or malfunction.
8
GND
1 µF
1 µF
1 µF
1Ω
1Ω
1Ω
V_o1
V_o2
V_o3
7
6
5
V_o1
V_o2
V_o3
SA57005
PS1
PS2/3
NC
V_IN
1
2
3
4
V_IN
1 µF
SL01706
Figure 11. Typical application circuit.
2002 Jun 20
8