PCA84C640 Datasheet, PDF (8/40 Pages) NXP Semiconductors – 8-bit microcontrollers with OSD and VST

Philips Semiconductors
8-bit microcontrollers with OSD and VST
Product specification
84C44X; 84C64X; 84C84X
7 RESET
The RESET pin (active LOW input) is used to initialize the
microcontroller to a defined state. The Reset configuration
is shown in Fig.5.
andbook, halfpage
RESET
VDD
R ≤ 100 kΩ
C
MCD174 ^VSS
Fig.4 External components for RESET pin.
7.1 Power-on-reset
The Power-on-reset circuit monitors the voltage level of
V_DD. If V_DD remains below the internal reference voltage
level V_ref (typically 1.3 V), the oscillator is inhibited.
When V_DD rises above V_ref, the oscillator is released and
the internal reset is active for a period of t_d (typically
50 µs).
Considering the V_DD rise time, the following measures for
a correct Power-on-reset can be taken:
• If the V_DD rises above the minimum operation voltage
before time period t_d is exceeded, no external
components are necessary (see Fig.6).
• If V_DD has a slow rise time, such that after the time
period (t_Vref + t_d) has elapsed the supply voltage is still
below the minimum operation voltage (V_min),
external components are required (see Figs 4 and 7).
To guarantee a correct reset operation, ensure that the
time constant RC ≥ 8 × t_VDD.
A definite Power-on-reset can be realized by applying an
(external) RESET signal during power-on.
handbook, full pagewidth
oscillator
inhibit
VDD
Vref
POWER-ON-RESET
RESET
internal
reset
MLA651
VSS
Fig.5 Reset configuration.
1996 Nov 29
8