87LPC764 Datasheet, PDF (8/56 Pages) NXP Semiconductors – Low power, low price, low pin count 20 pin microcontroller with 4 kbyte OTP

Philips Semiconductors
Low power, low price, low pin count (20 pin)
microcontroller with 4 kbyte OTP
Preliminary data
87LPC764
PIN DESCRIPTIONS
MNEMONIC PIN NO. TYPE
NAME AND FUNCTION
P0.0–P0.7
1, 13, 14,
16–20
I/O Port 0: Port 0 is an 8-bit I/O port with a user-configurable output type. Port 0 latches are configured in
the quasi-bidirectional mode and have either ones or zeros written to them during reset, as determined
by the PRHI bit in the UCFG1 configuration byte. The operation of port 0 pins as inputs and outputs
depends upon the port configuration selected. Each port pin is configured independently. Refer to the
section on I/O port configuration and the DC Electrical Characteristics for details.
The Keyboard Interrupt feature operates with port 0 pins.
Port 0 also provides various special functions as described below.
1
O
P0.0 CMP2
Comparator 2 output.
20
I
P0.1
CIN2B
Comparator 2 positive input B.
19
I
P0.2
CIN2A
Comparator 2 positive input A.
18
I
P0.3
CIN1B
Comparator 1 positive input B.
17
I
P0.4
CIN1A
Comparator 1 positive input A.
16
I
P0.5 CMPREF Comparator reference (negative) input.
14
O
P0.6 CMP1
Comparator 1 output.
13
I/O
P0.7 T1
Timer/counter 1 external count input or overflow output.
P1.0–P1.7
2–4, 8–12 I/O Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type, except for three pins as noted
below. Port 1 latches are configured in the quasi-bidirectional mode and have either ones or zeros
written to them during reset, as determined by the PRHI bit in the UCFG1 configuration byte. The
operation of the configurable port 1 pins as inputs and outputs depends upon the port configuration
selected. Each of the configurable port pins are programmed independently. Refer to the section on I/O
port configuration and the DC Electrical Characteristics for details.
Port 1 also provides various special functions as described below.
12
O
11
I
10
I/O
I/O
P1.0
P1.1
P1.2
TxD
RxD
T0
SCL
Transmitter output for the serial port.
Receiver input for the serial port.
Timer/counter 0 external count input or overflow output.
I²C serial clock input/output. When configured as an output, P1.2 is open
drain, in order to conform to I²C specifications.
9
I
P1.3 INT0
External interrupt 0 input.
I/O
SDA
I²C serial data input/output. When configured as an output, P1.3 is open
drain, in order to conform to I²C specifications.
8
I
P1.4 INT1
External interrupt 1 input.
4
I
P1.5 RST
External Reset input (if selected via EPROM configuration). A low on this pin
resets the microcontroller, causing I/O ports and peripherals to take on their
default states, and the processor begins execution at address 0. When used
as a port pin, P1.5 is a Schmitt trigger input only.
P2.0–P2.1
6, 7
I/O Port 2: Port 2 is a 2-bit I/O port with a user-configurable output type. Port 2 latches are configured in the
quasi-bidirectional mode and have either ones or zeros written to them during reset, as determined by
the PRHI bit in the UCFG1 configuration byte. The operation of port 2 pins as inputs and outputs
depends upon the port configuration selected. Each port pin is configured independently. Refer to the
section on I/O port configuration and the DC Electrical Characteristics for details.
Port 2 also provides various special functions as described below.
7
O
P2.0 X2
Output from the oscillator amplifier (when a crystal oscillator option is
selected via the EPROM configuration).
CLKOUT CPU clock divided by 6 clock output when enabled via SFR bit and in
conjunction with internal RC oscillator or external clock input.
6
I
P2.1 X1
Input to the oscillator circuit and internal clock generator circuits (when
selected via the EPROM configuration).
V_SS
5
I Ground: 0V reference.
V_DD
15
I Power Supply: This is the power supply voltage for normal operation as well as Idle and
Power Down modes.
2001 Oct 26
5