74HC534 Datasheet, PDF (8/13 Pages) NXP Semiconductors – Octal D-type flip-flop; positive edge-trigger; 3-state; inverting

Philips Semiconductors
Octal D-type flip-flop; positive edge-trigger;
3-state; inverting
AC WAVEFORMS
Product specification
74HC/HCT534
dbook, full pagewidth
CP INPUT
Qn OUTPUT
1/fmax
VM⁽¹⁾
tW
tPHL
VM⁽¹⁾
tTHL
tPLH
tTLH _MGM959
(1) HC: V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.6 Waveforms showing the clock (CP) to output (Q_n) propagation delays, the clock pulse width, output
transition times and the maximum clock pulse frequency.
andbook, full pagewidth
OE INPUT
10%
tr
90%
VM⁽¹⁾
tPLZ
Qn OUTPUT
LOW-to-OFF
OFF-to-LOW
Qn OUTPUT
HIGH-to-OFF
OFF-to-HIGH
tPHZ
10%
90%
outputs
enabled
tf
tPZL
VM⁽¹⁾
tPZH
VM⁽¹⁾
outputs
disabled
outputs
enabled
MGM961
(1) HC: V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and disable times.
1998 Apr 10
8