74AHC1G32 Datasheet, PDF (8/12 Pages) NXP Semiconductors – 2-input OR gate

Philips Semiconductors
2-input OR gate
AC WAVEFORMS
handbook, halfpage
inA, inB INPUT
outY OUTPUT
VM⁽¹⁾
tPHL
VM⁽¹⁾
Product specification
74AHC1G32; 74AHCT1G32
tPLH
MNA167
handbook, halfpage
VI
PULSE
GENERATOR
VCC
VO
D.U.T.
RT
CL
MNA101
FAMILY
AHC1G
AHCT1G
V_I INPUT
V_M
V_M
REQUIREMENTS INPUT OUTPUT
GND to V_CC
GND to 3.0 V
50% V_CC 50% V_CC
1.5 V
50% V_CC
Fig.5 The input (inA, inB) to output (outY)
propagation delays.
Definitions for test circuit:
C_L = Load capacitance including jig and probe capacitance.
(See Chapter “AC characteristics” for values).
R_T = Termination resistance should be equal to the output
impedance Z_o of the pulse generator.
Fig.6 Load circuitry for switching times.
1999 Jan 27
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