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TDA8775 Datasheet, PDF (7/16 Pages) NXP Semiconductors – Triple 10-bit video Digital-to-Analog Converter DAC
Philips Semiconductors
Triple 10-bit video Digital-to-Analog
Converter (DAC)
Preliminary specification
TDA8775
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX.
Timing (CL = 25 pF); see Fig.4
fclk(max) maximum clock frequency
tCPH
tCPL
tr
tf
tSU;DAT
tHD;DAT
Outputs
clock pulse width HIGH
clock pulse width LOW
clock rise time
clock fall time
input data set-up time
input data hold time
SLT = 1; RL = 37.5 Ω
SLT = 0; RL = 150 Ω
50
−
−
35
−
−
6
−
−
6
−
−
−
−
4
−
−
4
4
−
−
2.5
−
−
OUTB, OUTR AND OUTG ANALOG OUTPUTS (PINS 42, 46 AND 44, REFERENCED TO VSSA) FOR 37.5 Ω LOAD
VOUTmax maximum output voltage
BLANK and SYNC active
R and B channels
−
0.714 −
G channel
−
1.0 −
THD
total harmonic distortion
fi = 4.43 MHz; SLT = 1;
−
fclk = 50 MHz; RL = 37.5 Ω
−52 −
fi = 4.43 MHz; SLT = 0;
−
fclk = 35 MHz; RL = 150 Ω
−50 −
ZL
output load impedance
SLT = 1
tbf
37.5 tbf
SLT = 0
tbf
150 tbf
Transfer function
INL
DNL
αct
DC integral non-linearity
DC differential non-linearity
crosstalk DAC to DAC
DAC to DAC matching
−
±1
±2
−
±0.7 ±1.0
tbf
−
−
−
1.0 tbf
Switching characteristics; see Fig.5
td
input to 50% output delay
time
ts1
settling time
ts2
settling time
Output transients (glitches)
full-scale change;
−
SLT = 1; RL = 37.5 Ω
full-scale change;
−
SLT = 0; RL = 150 Ω
10 to 90% full-scale change; −
SLT = 1; RL = 37.5 Ω
10 to 90% full-scale change; −
SLT = 0; RL = 150 Ω
to ±1 LSB; SLT = 1;
−
RL = 37.5 Ω
to ±1 LSB; SLT = 0;
−
RL = 150 Ω
tbf
−
tbf
−
4
−
10
−
tbf
−
tbf
−
Vg
area for 1 LSB change
−
tbf
−
UNIT
MHz
MHz
ns
ns
ns
ns
ns
ns
V
V
dB
dB
Ω
Ω
LSB
LSB
dB
%
ns
ns
ns
ns
ns
ns
LSB.ns
1996 Aug 14
7