TDA8706 Datasheet, PDF (7/16 Pages) NXP Semiconductors – 6-bit analog-to-digital converter with multiplexer and clamp

Philips Semiconductors
6-bit analog-to-digital converter with
multiplexer and clamp
Preliminary specification
TDA8706
SYMBOL
PARAMETER
Outputs
DIGITAL VOLTAGE OUTPUTS (PINS 15 TO 20) (see Table 2)
V_OL
LOW level input voltage
V_OH
HIGH level output voltage
I_OZ
output current in 3-state mode
Switching characteristics
CLOCK TIMING (see Fig.3)
f_CLK
maximum clock frequency
f_mux
maximum multiplexing frequency
t_CLK
period
duty cycle
t_LOW
t_HIGH
t_CLR
t_CLF
LOW time
HIGH time
rise time
fall time
Select signals, Clamp, Data (see Figs 4 and 5)
t_S
t_r
t_f
t_CLPS
t_CLPH
t_CLPP
t_d
t_DH
set-up time select A, B and C
rise time A, B and band C
fall time A, B and band C
set-up time clamp asynchronous
hold time clamp asynchronous
clamp pulse
data output delay time
data hold time
Transfer function
ILE
DC integral linearity error
DLE
DC differential linearity error
AILE
AC integral linearity error
EB
effective bits
Timing
DIGITAL OUTPUTS
T_dt
3-state delay time
T_sto
sampling time offset
CONDITIONS
I_O = 1 mA
I_O = 0.5 mA
0.4 V < V_O < V_CCD
CLK = V_IH
at 50%
at 50%
at 10 to 90%
at 90 to 10%
at 10 to 90%
at 90 to 10%
C_CLP = 10 nF
note 3
note 3
see Fig.6
MIN. TYP. MAX. UNIT
0
−
2.7 −
−20 −
0.4 V
V_CCD V
+20 µA
20 −
10 −
50 −
45 50
16 −
22.5 −
4
6
4
6
−
MHz
−
MHZ
−
ns
66.6 %
−
ns
−
ns
−
ns
−
ns
35 −
−
ns
4
6
−
ns
4
6
−
ns
0
−
−
0
−
−
−
3
−
µs
−
15 24 ns
12 −
−
ns
−
−
±0.75 LSB
−
−
±0.5 LSB
−
−
±2 LSB
−
5.7 −
bits
−
16 25 ns
−
2
−
ns
1996 Aug 20
7