TDA8705 Datasheet, PDF (7/16 Pages) NXP Semiconductors – 6-bit high-speed dual Analog-to-Digital Converter ADC

Philips Semiconductors
6-bit high-speed dual Analog-to-Digital
Converter (ADC)
Product specification
TDA8705
SYMBOL
PARAMETER
Switching characteristics
CLOCK INPUT CLK; note 1; see Fig.3
f_clk(max)
t_CPH
t_CPL
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
Analog signal processing
LINEARITY
ILE
DC integral linearity error
DLE
DC differential linearity error
AILE
AC integral linearity error
OFE
offset error between A and B
GE
gain error between A and B
MID
middle scale output code A and B
BANDWIDTH; f_clk = 40 MHz
B
−0.5 dB analog bandwidth
t_STLH
t_STHL
analog input settling time LOW-to-HIGH
analog input settling time HIGH-to-LOW
HARMONICS; f_clk = 40 MHZ; see Fig.5
h₁
fundamental harmonics (full scale)
h_all
harmonics (full scale);
all components
second harmonics
third harmonics
THD
total harmonic distortion
SIGNAL-TO-NOISE RATIO; note 7; see Fig.5
S/N
signal-to-noise ratio (full scale)
EFFECTIVE BITS; note 7; see Figs 5 and 6
EB
effective bits
TWO-TONE; note 8
TTIR
two-tone intermodulation rejection
CONDITIONS
note 3
f_i = 10 MHz;
f_clk = 40 MHz; note 4
f_i = 10 MHz;
f_clk = 40 MHz; note 4
input voltage floating
full-scale sine wave;
note 5
full-scale square wave;
Fig.4; note 6
full-scale square wave;
Fig.4; note 6
f_i = 10 MHz
f_i = 10 MHz
f_i = 10 MHz
without harmonics;
f_clk = 40 MHz;
f_i = 10 MHz
f_clk = 40 MHz
f_i = 10 MHz
f_i = 20 MHz
f_clk = 40 MHz
MIN. TYP. MAX. UNIT
40
−
−
MHz
10
−
−
ns
10
−
−
ns
−
±0.25 ±0.5 LSB
−
±0.25 ±0.5 LSB
−
±0.5 ±1.0 LSB
±1
−
±2
LSB
±1
−
±2
LSB
31
−
32
−
50
−
MHz
−
8
−
ns
−
5
−
ns
−
−
0
dB
−
−49 −
dB
−
−51 −
dB
−
−46 −40 dB
34
37
−
dB
−
5.8 −
bits
−
5.6 −
bits
−
48
−
dB
1996 Jan 12
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