TDA6101Q Datasheet, PDF (7/16 Pages) NXP Semiconductors – Video output amplifier

Philips Semiconductors
Video output amplifier
Preliminary specification
TDA6101Q
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
O_v
cathode output voltage overshoot
SVRRH high supply voltage rejection ratio
SVRRL low supply voltage rejection ratio
V_ocAC = 100 V (p-p);
−
V_ocDC = 100 V square
wave; f < 1 MHz;
t_r = t_f = 40 ns;
see Figs 4 and 5; note 1
f < 50 kHz; note 2
−
f < 50 kHz; note 2
−
9
−
%
85
−
dB
70
−
dB
Notes
1. If the difference between V_DDL and V_ip is less than 7 V, overshoot cannot be specified.
2. SVRR: The ratio of the change in supply voltage to the change in input voltage when there is no change in output
voltage.
Cathode output
The cathode output is protected against peak currents
(caused by positive voltage peaks during high-resistance
flash) of 5 A maximum with a charge content of 100 µC.
The cathode is also protected against peak currents
(caused by positive voltage peaks during low-resistance
flash) of 10 A maximum with a charge content of 100 nC.
Flashover protection
The TDA6101Q incorporates protection diodes against
CRT flashover discharges that clamp the cathode output
pin to the V_DDH pin. The DC supply voltage at the V_DDH pin
has to be within the operating range of 180 to 210 V to
ensure that the Absolute Maximum Rating for V_DDH of
250 V will not be exceeded during flashover. To limit the
diode current, an external 820 Ω carbon high-voltage
resistor in series with the cathode output and a 2 kV spark
gap are needed (for this resistor-value, the CRT has to be
connected to the main PCB). This addition produces an
increase in the rise and fall times of approximately 5 ns
and a decrease in the overshoot of approximately 3%.
V_DDH to GND must be decoupled:
1. With a capacitor >20 nF with good HF behaviour
(e.g. foil). This capacitance must be placed as close
as possible to pins 6 and 4, but definitely within 5 mm.
2. With a capacitor >10 µF on the picture tube base print
(common for three output stages).
V_DDL to GND must be decoupled:
1. With a capacitor >20 nF with good HF behaviour
(e.g. ceramic). This capacitance must be placed as
close as possible to pins 2 and 4, but definitely within
10 mm.
Switch-off behaviour
The switch-off behaviour of the TDA6101Q is defined:
when the bias current becomes zero, at V_DDL (pin 2) lower
than approximately 5 V, all the output pins
(pins 7, 8 and 9) will be high.
1995 Feb 07
7