TDA4566 Datasheet, PDF (7/11 Pages) NXP Semiconductors – Colour transient improvement circuit

Philips Semiconductors
Colour transient improvement circuit
Preliminary specification
TDA4566
PARAMETER
Y-signal path
Y-input voltage
(composite signal)
(peak-to-peak value)
Internal bias voltage
Input current
during picture content
during sync. pulse
Y-signal delay at pin 12
at V_15−18 = 0 to 2.5 V
at V_15-18 = 3.5 to 5.5 V
at V_15−18 = 6.5 to 8.5 V
at V_15-18 = 9.5 to12 V
Fine adjustment of Y-signal
delay for all 4 steps
Signal delay between pin 11
and pin 12
Dependency of delay time
on temperature
on supply voltage
Input switching current
Y-signal attenuation
pin 11 from pin 17
pin 12 from pin 17
Frequency response at
3 MHz referred to 0.5 MHz
pin 11
pin 12
CONDITIONS
SYMBOL
MIN. TYP.
MAX.
UNIT
capacitive
coupling
during clamping
V_17(p-p)
V_17-18
−
0.45 0.62
V
2.1
2.4
2.7
V
S1 open;
R₁₄ = 1.2 kΩ;
notes 3 and 4
I₁₇
−I₁₇
t_17-18
t_17-18
t_17-18
t_17-18
−
8
12
µA
−
100
150
µA
490
550
610
ns
580
640
700
ns
670
730
790
ns
760
820
880
ns
S1 closed
t_17-12
−
37
−
ns
S1 open
t_11-12
160
180
200
ns
t--₁^---₇^-∆---_–^-t-1-₁^{--72----–}•^---1--∆^2---T----_j
−
0.001 −
K^−1
-t-₁---₇^∆----_–^t--1-₁-⁷-₂---^–-_•---¹--_∆²---V--- _P
−
−0.03 −
V^−1
−I₁₅
f = 0.5 MHz
−
15
25
µA
V₁₁/V₁₇
V₁₂/V₁₇
−1
0
+1
dB
0
+1
+2
dB
note 5
-V--V--₁--₁₁---¹--(--0(--3-.--5--M---M--H---H--z--z-)---)
0
−
3.0
dB
-V--V--₁--₂₁---²--(--0(--3-.--5--M---M--H---H--z--z-)---)
0
−
3.0
dB
March 1991
7