TDA1592 Datasheet, PDF (7/20 Pages) NXP Semiconductors – PLL stereo decoder and noise blanker

Philips Semiconductors
PLL stereo decoder and noise blanker
Preliminary specification
TDA1592
SYMBOL
PARAMETER
CONDITIONS
α₁₁₄
α₁₉₀
PSRR
ACI (Adjacent Channel Interference)
power supply ripple rejection
f = 114 kHz; note 4
f = 190 kHz; note 4
f = 100 Hz;
V_{ripple (rms)} = 100 mV
VCO (pin 2)
f_osc
oscillator frequency (ceramic resonator)
frequency range of free running oscillator
∆f/f
capture and holding range
V₇
VCO-off voltage (pin 7)
Mono/stereo control (pins 16, 17 and 19)
V_{i pilot}
pilot threshold voltage for automatic switching stereo on
by pilot input voltage (RMS value)
stereo off
HYS
hysteresis of pilot threshold voltage
V₁₉
switching voltage for external mono control
(pin 19)
V_ref
V_16-17
reference input voltage range (pin 17)
control voltage for channel separation due to
pin 17 (V_ref)
α_cs = 6 dB; see Fig.5
α_cs = 20 dB; see Fig.5
Pilot indicator logic level output (pin 18)
V₁₈
LOW voltage
I₁₈
HIGH current
I₁₈ = 500 µA
V₁₈ = 10 V
Muting (pin 8)
MUTE_att mute attenuation (pin 8)
V_o(offset)
DC offset voltage (pins 10 and 11)
V₈ < 1.6 V
V₈ > 4 V
after muting
HCC (pin 15)
CR_deem
V_15-17
control range of de-emphasis
for European standard
for USA standard
control voltage (pin 15 due to pin 17) in both
standards
see Figs 7 and 8
C_deem = 6.8 nF
C_deem = 10 nF
lower value CR_deem
upper value CR_deem
MIN. TYP. MAX. UNIT
−
80 −
dB
−
70 −
dB
−
35 −
dB
−
456 −
kHz
451 −
459 kHz
−
±0.65 −
%
0
−
0.6 V
−
24 30 mV
8
20 −
mV
−
2
−
dB
−
−
0.7 V
1
−
5
V
−80 −100 −120 mV
−40 −55 −70 mV
−
250 400 mV
−
−
1
µA
80 −
−
−
−
−
−
dB
0.2 dB
±50 mV
50 −
150 µs
75 −
225 µs
−
0
−
mV
−
−300 −
mV
1996 May 31
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