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| NCX8193_15 Datasheet, PDF (7/21 Pages) NXP Semiconductors – Audio jack detection and configuration with false detection prevention | |||
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NXP Semiconductors
NCX8193
Audio jack detection and configuration with false detection prevention
Table 5. Limiting values â¦continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
Tj(max)
maximum junction
temperature
ï40
+125
ï°C
Tstg
storage temperature
ï65
+150
ï°C
Ptot
total power dissipation
-
250
mW
11. Recommended operating conditions
Table 6.
Symbol
VCC
VCC(IO)
VI
ïV
Tamb
Recommended operating conditions
Parameter
Conditions
supply voltage
input/output supply voltage
input voltage
VCC(IO) ï£ VCC
MIC; J_MIC
voltage difference
ambient temperature
VCC to J_DET
12. Thermal characteristics
Min
Max
Unit
2.4
5.25
V
1.6
VCC
V
0
VCC
V
-
5.5
V
ï40
+85
ï°C
Table 7.
Symbol
Rth(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to ambient
Conditions
Typ
[1] 148
Unit
K/W
[1] Rth(j-a) is dependent upon board layout. To minimize Rth(j-a), ensure that all pins have a solid connection to larger copper layer areas. In
multi-layer PCBs, the second layer should be used to create a large heat spreader area below the device. Avoid using solder-stop
varnish under the device.
13. Static characteristics
Table 8. Static characteristics
At recommended operating conditions, unless otherwise specified typical values are measured with VCC = 3.6 V and
VCC(IO) = 1.8 V. Voltages are referenced to GND (ground 0 V).
Symbol Parameter Conditions
Tamb = 25 ï°C
Tamb = ï40 ï°C to +85 ï°C Unit
Min Typ Max
Min
Max
Digital control
VIH
HIGH-level EN
input voltage
-
-
-
0.7VCC(IO)
-
V
VIL
LOW-level
EN
input voltage
-
-
-
-
0.3VCC(IO) V
VOH
HIGH-level
DET; S/E; IO = 0.5 mA
output voltage
-
-
-
0.8VCC(IO)
-
V
VOL
LOW-level
DET; S/E; IO = 0.5 mA
output voltage
-
-
-
-
0.2VCC(IO) V
CI
input
J_DET
capacitance EN
-
5
-
-
-
1
-
-
-
pF
-
pF
NCX8193
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 â 21 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
7 of 21
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