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74LVT573 Datasheet, PDF (7/12 Pages) NXP Semiconductors – 3.3V Octal D-type transparent latch 3-State
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Philips Semiconductors
3.3V Octal D-type transparent latch
(3-State)
Product specification
74LVT573
OE
Qn
1.5V
1.5V
tPZH
tPHZ
1.5V
2.7V
0V
VOH
VOH –0.3V
0V
2.7V
OE
1.5V
1.5V
0V
tPZL
tPLZ
3V
Qn
1.5V
VOL +0.3V
VOL
SV00119
Waveform 4. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
SV00120
Waveform 5. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORM
VCC
PULSE
GENERATOR
VIN
RT
D.U.T.
VOUT
CL
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
6.0V
Open
90%
RL
GND
NEGATIVE
PULSE
RL
POSITIVE
PULSE
10%
VM
10%
tW
VM
10%
tTHL (tF)
tTLH (tR)
90%
VM
90%
VM
tW
VM = 1.5V
Input Pulse Definition
90%
AMP (V)
0V
tTLH (tR)
tTHL (tF)
AMP (V)
10%
0V
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
FAMILY
74LVT
INPUT PULSE REQUIREMENTS
Amplitude Rep. Rate tW
tR
tF
2.7V
v10MHz 500ns v2.5ns v2.5ns
SV00092
1998 Feb 19
7
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