74HC574 Datasheet, PDF (7/7 Pages) NXP Semiconductors – Octal D-type flip-flop; positive edge-trigger; 3-state

Philips Semiconductors
Octal D-type flip-flop; positive edge-trigger;
3-state
AC WAVEFORMS
Product specification
74HC/HCT574
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.6
Waveforms showing the clock input (CP)
pulse width, the CP input to output (Q_n)
propagation delays, the output transition
times and the maximum clock pulse
frequency.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and
disable times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
The shaded areas indicate when the input is permitted
to change for predictable output performance.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8 Waveforms showing the data set-up and
hold times for D_n input to CP input.
December 1990
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