74HC563 Datasheet, PDF (7/7 Pages) NXP Semiconductors – Octal D-type transparent latch; 3-state; inverting

Philips Semiconductors
Octal D-type transparent latch; 3-state;
inverting
AC WAVEFORMS
Product specification
74HC/HCT563
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.6 Waveforms showing the data input (D_n) to
output (Q_n) propagation delays and the
output transition times.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7
Waveforms showing the latch enable input
(LE) pulse width, the latch enable input to
output (Q_n) propagation delays and the
output transition times.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.9 Waveforms showing the data set-up and
hold times for D_n input to LE input
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8 Waveforms showing the 3-state enable and
disable times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
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