74HC354 Datasheet, PDF (7/14 Pages) NXP Semiconductors – 8-input multiplexer/register with transparent latches; 3-state

Philips Semiconductors
8-input multiplexer/register with
transparent latches; 3-state
Product specification
74HC/HCT354
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
I_CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
min.
74HC
+25
−40 to +85
typ. max. min. max.
−40 to +125
min. max.
UNIT
V_CC ^WAVEFORMS
(V)
t_PHL/ t_PLH propagation delay
D_n to Y, Y
t_PHL/ t_PLH propagation delay
E to Y, Y
61 210
265
22 42
53
18 36
45
63 250
315
23 50
63
18 43
54
315 ns
63
54
375 ns
75
64
2.0 Fig.7
4.5
6.0
2.0 Fig.6
4.5
6.0
t_PHL/ t_PLH propagation delay
S_n to Y, Y
77 260
325
28 52
65
22 44
55
390 ns
78
66
2.0 Fig.8
4.5
6.0
t_PHL/ t_PLH propagation delay
LE to Y, Y
t_PZH/ t_PZL 3-state output enable time
OE_n to Y, Y
77 290
365
28 58
73
22 49
62
39 125
155
14 25
31
11 21
26
435 ns
87
74
190 ns
38
32
2.0 Fig.9
4.5
6.0
2.0 Fig.10
4.5
6.0
t_PZH/ t_PZL 3-state output enable time
OE₃ to Y, Y
44 135
170
16 27
34
13 23
29
205 ns
41
35
2.0 Fig.10
4.5
6.0
t_PHZ/ t_PLZ 3-state output disable time
OE_n to Y, Y
t_PHZ/ t_PLZ 3-state output disable time
OE₃ to Y, Y
50 155
195
18 31
39
14 26
33
55 155
195
20 31
39
16 26
33
235 ns
47
40
235 ns
47
40
2.0 Fig.10
4.5
6.0
2.0 Fig.10
4.5
6.0
t_THL/ t_TLH output transition time
14 60
75
5 12
15
4 10
13
90 ns 2.0 Figs 7, 8 and 9
18
4.5
15
6.0
t_W
data enable pulse width E 80 17
LOW
16 6
14 5
t_W
latch enable pulse width LE 80 17
LOW
16 6
14 5
100
120
20
24
17
20
100
120
20
24
17
20
ns 2.0 Fig.6
4.5
6.0
ns 2.0 Fig.9
4.5
6.0
December 1990
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