74HC137_1 Datasheet, PDF (7/8 Pages) NXP Semiconductors – 3-to-8 line decoder/demultiplexer with address latches; inverting

Philips Semiconductors
3-to-8 line decoder/demultiplexer with
address latches; inverting
AC WAVEFORMS
Product specification
74HC/HCT137
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.6 Waveforms showing the address input (A_n) and
enable inputs (E₂) to output (Y_n) propagation
delays and the output transition times.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7 Waveforms showing the enable input (E₁, LE)
to output (Y_n) propagation delays and the
output transition times.
The shaded areas indicate when the input is permitted
to change for predictable output performance.
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT: V_M = 1.3 V; V_I = GND to 3 V.
Fig.8 Waveforms showing the data set-up, hold times for A_n input to LE input and the latch enable pulse width.
APPLICATION INFORMATION
December 1990
Fig.9 6-to-64 line decoder with input address storage.
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