UDA1355H Datasheet, PDF (66/76 Pages) NXP Semiconductors – Stereo audio codec with SPDIF interface

Philips Semiconductors
Stereo audio codec with SPDIF interface
Preliminary specification
UDA1355H
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX.
UNIT
IEC 60958 inputs
V_i(p-p)
input voltage (peak-to-peak
value)
0.2
0.5
3.3
V
R_i
V_hys
I_DD(diff)
input resistance
hysteresis voltage
I_{DD(DAC,input)}/I_{DD(DAC,no input)}
−
6
−
kΩ
−
40
−
mV
−
tbf
−
−
Power consumption
P_tot
total power consumption IEC 60958 input; f_s = 48 kHz
DAC in playback mode −
74
−
mW
DAC in Power-down mode −
63
−
mW
Notes
1. All power supply pins (V_DD and V_SS) must be connected to the same external power supply unit.
2. When the DAC must drive a higher capacitive load (above 50 pF), then a series resistor of 100 Ω must be used in
order to prevent oscillations in the output.
16 TIMING CHARACTERISTICS
V_DD = 2.7 to 3.6 V; T_amb = −20 to +85 °C; R_L = 5 kΩ; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
Device reset
t_rst
reset time
−
PLL lock time
t_lock
time-to-lock
f_s = 32 kHz
f_s = 44.1 kHz
f_s = 48 kHz
f_s = 96 kHz
I²S-bus interface (see Fig.20)
T_cy(BCK)
t_BCKH
t_BCKL
t_r
t_f
t_su(DATAI)
t_h(DATAI)
t_d(DATAO-BCK)
bit clock period
bit clock HIGH time
bit clock LOW time
rise time
fall time
data input set-up time
data input hold time
data output to bit clock
delay
t_d(DATAO-WS)
data output to word
select delay
t_h(DATAO)
t_su(WS)
t_h(WS)
data output hold time
word select set-up time
word select hold time
−
−
−
−
1_/128fs
30
30
−
−
10
10
−
−
0
10
10
2003 Apr 10
66
TYP. MAX. UNIT
250 −
µs
85.0 −
ms
63.0 −
ms
60.0 −
ms
40.0 −
ms
−
−
ms
−
−
ns
−
−
ns
−
20 ns
−
20 ns
−
−
ns
−
−
ns
−
30 ns
−
30 ns
−
−
ns
−
−
ns
−
−
ns