|
PCD5013 Datasheet, PDF (65/76 Pages) NXP Semiconductors – FLEX roaming decoder II | |||
|
◁ |
Philips Semiconductors
FLEX⢠roaming decoder II
Product speciï¬cation
PCD5013
12 DC CHARACTERISTICS
Tamb = â25 to +70 °C; VDD = 2.2 V; f = 76.8 kHz; unless otherwise speciï¬ed.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDD
IDD(stby)
IDD
supply voltage
standby supply current
operating supply current
1.8
2.2
3.6
V
on = 0; note 1 â
4.9
24
µA
on = 1; note 2 â
6.0
â
µA
Digital inputs: OSCPD, TEST2, TEST3, RESET, LOBAT, EXTS0, EXTS1, SS and MOSI
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
ILI
LOW/HIGH-level input leakage current
â
â
0.8VDD â
â
â
0.2VDD V
â
V
1
µA
Digital outputs: MISO, READY, CLKOUT, SYMCLK and S0 to S7
VOL
LOW-level output voltage
Isink = 0.8 mA
â
0.1
0.4
V
VOH
HIGH-level output voltage
Isource = â0.8 mA VDD â 0.4 VDD â 0.1 â
V
ILO
LOW/HIGH-level output leakage current 3-state outputs â
â
1
µA
Notes
1. External clock signal (frequency = 76.8 kHz, amplitude = VSS to VDD) at pin EXTAL; OSCPD = HIGH;
test inputs = LOW; other inputs = HIGH; outputs unconnected; SPI transmit enabled; COD bit set to logic 1 (see
Section 8.4.4); to obtain the supply current of an application with a crystal connected as in Fig.19, a typical oscillator
current of 2 µA needs to be added to this value (see Chapter 14); Tamb = 25 °C.
2. As note 1, but PCD5013 and synchronous to a typical FLEX⢠data stream (collapse value = 4), Tamb = 25 °C.
13 AC CHARACTERISTICS
Tamb = â25 to +70 °C, VDD = 1.8 to 3.6 V, fEXTAL = 76.8 kHz, maximum load capacitance = 50 pF connected to any
digital output; unless otherwise speciï¬ed.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Reset timing
tW(rst)
tLH(RESET-READY)
tHL(RESET-READY)
Start-up timing
RESET pulse width
RESET LOW to READY HIGH
RESET HIGH to READY LOW
stable 76.8 kHz clock
tstrt(osc)
th(rst)
tHL(RESET-READY)
tWUL(osc-READY)
oscillator start-up time
see Fig.19
RESET hold time
RESET HIGH to READY LOW note 1
oscillator warmed up to
READY LOW
note 1
SPI timing
fSCK
Tcy(SCK)
tLEAD1
tLAG1
operating frequency
cycle time
select lead time
de-select lag time
200 â
â
â
â
1
â
ns
200 ns
â
s
â
0.5 â
s
200 â
â
ns
â
76800 â
T
â
76800 â
T
0
â
1
MHz
1000 â
â
ns
200 â
â
ns
200 â
â
ns
1999 Apr 12
65
|
▷ |