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| PSMN2R1-40PL_15 Datasheet, PDF (6/13 Pages) NXP Semiconductors – N-channel 40 V, 2.2 mΩ logic level MOSFET in SOT78 | |||
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NXP Semiconductors
PSMN2R1-40PL
N-channel 40 V, 2.2 m⦠logic level MOSFET in SOT78
Symbol
Parameter
Conditions
Dynamic characteristics
QG(tot)
total gate charge
ID = 25 A; VDS = 32 V; VGS = 5 V;
Fig. 13; Fig. 14
ID = 25 A; VDS = 32 V; VGS = 10 V;
Fig. 13; Fig. 14
QGS
gate-source charge
ID = 25 A; VDS = 32 V; VGS = 10 V;
Fig. 14; Fig. 13
QGD
gate-drain charge
ID = 25 A; VDS = 32 V; VGS = 10 V;
Fig. 13; Fig. 14
Ciss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; Fig. 15
Crss
reverse transfer
capacitance
td(on)
tr
turn-on delay time
rise time
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
RG(ext) = 5 Ω
td(off)
turn-off delay time
tf
fall time
Source-drain diode
VSD
source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 16
trr
reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
Qr
recovered charge
VDS = 25 V
Min Typ Max Unit
-
87.8 -
nC
-
168.9 -
nC
-
20.8 -
nC
-
29.6 -
nC
-
9584 -
pF
-
1190 -
pF
-
585 -
pF
-
56
-
ns
-
96
-
ns
-
151 -
ns
-
93
-
ns
-
0.8 1.2 V
-
45
-
ns
-
62
-
nC
300
10
4.5
ID
3.5
(A)
200
003aah289
VGS(V) = 3
10
RDSon
(mΩ)
7.5
003aah230
2.8
5
100
2.6
2.5
2.4
0
0
0.5
1
1.5 VDS(V) 2
0
0
2.5
5
7.5
10
VGS(V)
Fig. 6.
Tj = 25 °C; tp = 300 μs
Output characteristics; drain current as a
function of drain-source voltage; typical values
Fig. 7.
Drain-source on-state resistance as a function
of gate-source voltage; typical values
PSMN2R1-40PL
Product data sheet
All information provided in this document is subject to legal disclaimers.
1 February 2013
© NXP B.V. 2013. All rights reserved
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