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| HEF4517B Datasheet, PDF (6/8 Pages) NXP Semiconductors – Dual 64-bit static shift register | |||
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Philips Semiconductors
Dual 64-bit static shift register
Product speciï¬cation
HEF4517B
LSI
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; input transition times ⤠20 ns
Dynamic power
dissipation per
package (P)
VDD
V
TYPICAL FORMULA FOR P (µW)
5
7 000 fi + â (foCL) Ã VDD2
10
28 000 fi + â (foCL) Ã VDD2
15
70 000 fi + â (foCL) Ã VDD2
where
fi = input freq. (MHz)
fo = output freq. (MHz)
CL = load capacitance (pF)
â (foCL) = sum of outputs
VDD = supply voltage (V)
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ⤠20 ns
VDD
V
SYMBOL MIN. TYP. MAX.
Propagation delays
CP â On
HIGH to LOW
LOW to HIGH
Output transition
times
HIGH to LOW
LOW to HIGH
5
10 tPHL
15
5
10 tPLH
15
5
10 tTHL
15
5
10 tTLH
15
220 440 ns
85 170 ns
60 120 ns
190 380 ns
75 150 ns
50 100 ns
60 120 ns
30 60 ns
20 40 ns
60 120 ns
30 60 ns
20 40 ns
TYPICAL EXTRAPOLATION
FORMULA
193 ns + (0,55 ns/pF) CL
74 ns + (0,23 ns/pF) CL
52 ns + (0,16 ns/pF) CL
163 ns + (0,55 ns/pF) CL
64 ns + (0,23 ns/pF) CL
42 ns + (0,16 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
January 1995
6
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