FT18 Datasheet, PDF (6/16 Pages) NXP Semiconductors – Frame Transfer CCD Image Sensor

Philips Semiconductors
Frame Transfer CCD Image Sensor
Product specification
FT 18
Timing diagrams (for default operation)
AC Characteristics
Horizontal frequency (1/Tp)
Vertical frequency
Min.
-
-
Typical
36
750
Max.
40
833
Unit
MHz
kHz
Line Timing
Phase
1100 1110 1120 1130 1140 1150 10 20 30 40 50 60 70 80 90 100 110 120
or
pixel count
1/(36MHz) = 27.8ns
0
One charge pumping cycle of the image gates (during line blanking), shifting the charge of one line back and forth
A1 ^H
L
A2 ^H
L
A3 ^H
L
A4 ^H
L
19
64
28 37
46 55
One cycle of the storage gates (during line blanking), moving one line from storage to output register
B2 ^H
L
B3 ^H
L
B4 ^H
L
B1 ^H
L
32
62
26
44
38
56
20
50
SSC ^H
L
PB ^H
L
BLC ^H
L
CB ^H
L
CR ^H
L
Start-Stop C-clocks
Pre-Blanking
Black Level Clamp
1131
Composite Blanking
Charge Reset
0
72 1080 pixels until 1152
C clocks stopped for 2 microseconds
0
79
0
79
99
19
64
1.25 microseconds
Pixel Timing
Tp/6 = (1/36MHz)/6 = 4.63ns
Tp = 1/36MHz = 27.8ns
SSC ^H
L
C1 ^H
L
C2 ^H
L
C3 ^H
L
RG ^H
L
In this figure, charge is transported to the left output buffer (normal readout) by moving it from C1 to C2 to C3 etc.
By exchanging the timing of C1 and C2, charge will be transported to the right output buffer (mirrored readout).
Figure 3 - Line and pixel timing diagrams
2000 January
6