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BUK769R6-80E_15 Datasheet, PDF (6/13 Pages) NXP Semiconductors – N-channel TrenchMOS standard level FET
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NXP Semiconductors
BUK769R6-80E
N-channel TrenchMOS standard level FET
Symbol
Parameter
Conditions
Ciss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; Fig. 15
Crss
reverse transfer
capacitance
td(on)
tr
turn-on delay time
rise time
VDS = 60 V; RL = 3 Ω; VGS = 10 V;
RG(ext) = 5 Ω
td(off)
turn-off delay time
tf
fall time
LD
internal drain
from upper edge of mounting base to
inductance
centre of die
LS
internal source
measured from source lead to source
inductance
bond pad ; Tj = 25 °C
Source-drain diode
VSD
source-drain voltage IS = 20 A; VGS = 0 V; Tj = 25 °C; Fig. 16
trr
reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
Qr
recovered charge
VDS = 25 V
Min Typ Max Unit
-
3512 4682 pF
-
356 428 pF
-
206 282 pF
-
17.8 -
ns
-
32.7 -
ns
-
38.6 -
ns
-
34.3 -
ns
-
2.5 -
nH
-
7.5 -
nH
-
0.82 1.2 V
-
37
-
ns
-
54.8 -
nC
180
VGS(V) = 10
8
ID
(A)
120
003aah769
6
5.5
20
RDSon
(mΩ)
15
003aah770
10
5
60
5
4.5
4
0
0
1
2
3 VDS(V) 4
0
0
5
10
15 VGS(V) 20
Fig. 6.
Tj = 25 °C; tp = 300 μs
Output characteristics; drain current as a
function of drain-source voltage; typical values
Fig. 7.
Drain-source on-state resistance as a function
of gate-source voltage; typical values
BUK769R6-80E
Product data sheet
All information provided in this document is subject to legal disclaimers.
5 October 2012
© NXP B.V. 2012. All rights reserved
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