BSP255 Datasheet, PDF (6/10 Pages) NXP Semiconductors – P-channel enhancement mode vertical D-MOS transistor

Philips Semiconductors
P-channel enhancement mode
vertical D-MOS transistor
handbook^−,¹h⁰alfpage
VGS
(V)
−8
MBH443
−6
−4
−2
0
0
0.5
1.0
1.5
2.0
2.5
Qg (nC)
Product specification
BSP255
handbo^−ok⁸,⁰h⁰alfpage
ID
(mA)
−600
−400
MBH441
VGS = −10 V
−4.5 V
−4.0 V
−3.5 V
−200
0
0
−3.0 V
−2.5 V
−2.0 V
−2
−4
−6
−8 −10 −12
VDS (V)
V_DD = −50 V: I_D = −180 mA.
Fig.5 Gate-source voltage as a function of
total gate charge; typical values.
T_j = 25 °C.
Fig.6 Output characteristics; typical values.
−800
handbook, halfpage
ID
(mA)
−600
MBH440
−400
−200
0
0
−2
−4
−6
−8
−10
VGS (V)
V_DS = −10 V; T_j = 25 °C.
Fig.7 Transfer characteristics; typical values.
1996 Aug 05
handboo^−k², ^.h⁵alfpage
ISD
(A)
−2.0
−1.5
MBH436
−1.0
−0.5
(1) (2)
(3)
0
0
−0.4
V_GD = 0.
(1) T_j = 150 °C.
(2) T_j = 25 °C.
(3) T_j = −65 °C.
−0.8
−1.2
−1.6
−2.0
VSD (V)
Fig.8 Source-drain current as a function of
source-drain diode forward voltage;
typical values.
6