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BGA3021_15 Datasheet, PDF (6/14 Pages) NXP Semiconductors – 1.2 GHz 16 dB gain CATV amplifier | |||
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NXP Semiconductors
BGA3021
1.2 GHz 16 dB gain CATV amplifier
Table 8. Characteristics at VCC = 5 V; ICC = 165 mA
Tamb = 25 ï°C; typical values at VCC = 5 V; ZS = ZL = 75 ï; input and output connected with
1:1 balun, VI(CTRL) = 0 V (minimum total supply current); 40 MHz ï£ f1 ï£ 1200 MHz unless otherwise
specified.
Symbol Parameter
Conditions
Min Typ Max Unit
VCC
ICC(tot)
ï¼s21ï¼2
SLsl
FL
supply voltage
total supply current
insertion power gain
slope straight line
flatness of
frequency response
RF input AC coupled
f = 40 MHz
4.75 5.00
- 165
- 16.3
- ï1.9
[1] -
0.2
5.25 V
- mA
- dB
- dB
- dB
PL(1dB) output power at
1 dB gain compression
- 23 - dBm
IP3O
output third-order
intercept point
[2] -
38 -
dBm
IP2O
output second-order
intercept point
[3] -
69 -
dBm
CTB
CSO
composite triple beat
composite second-order
distortion
VO = 35 dBmV
VO = 35 dBmV
[4] -
ï66 -
dBc
[4] -
ï75 -
dBc
NF
noise figure
f = 500 MHz
- 4.1 - dB
RLin
input return loss
f = 40 MHz to 80 MHz
f = 80 MHz to 160 MHz
- ï19 - dB
- ï21 - dB
f = 160 MHz to 320 MHz
- ï20 - dB
f = 320 MHz to 640 MHz
- ï20 - dB
f = 640 MHz to 1000 MHz
- ï20 - dB
f = 1000 MHz to 1200 MHz - ï14 - dB
RLout output return loss
f = 40 MHz to 80 MHz
f = 80 MHz to 160 MHz
- ï22 - dB
- ï21 - dB
f = 160 MHz to 320 MHz
- ï18 - dB
f = 320 MHz to 640 MHz
- ï18 - dB
f = 640 MHz to 1000 MHz
- ï18 - dB
f = 1000 MHz to 1200 MHz - ï15 - dB
[1] Flatness is defined as peak deviation to straight line.
[2] Fundamental frequency f1 = 500 MHz, fundamental frequency f2 = 501 MHz. The intermodulation product
(IM3) is measured at 2 ï´ f1 ï f2 = 499 MHz. The output power of the fundamental frequencies is 10 dBm
per frequency.
[3] Fundamental frequency f1 = 240 MHz, fundamental frequency f2 = 260 MHz. The intermodulation product
(IM2) is measured at f1 + f2 = 500 MHz. The output power of the fundamental frequencies is 10 dBm per
frequency.
[4] Measured with 79 NTSC channels.
BGA3021
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 â 25 February 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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