74HC_HCT594_15 Datasheet, PDF (6/26 Pages) NXP Semiconductors – 8-bit shift register with output register

NXP Semiconductors
74HC594; 74HCT594
8-bit shift register with output register
7. Functional description
Table 3. Function table^[1]
Function
Clear shift register
Clear storage register
Load DS into shift register stage 0, advance previous stage data to the next stage
Transfer shift register data to storage register and outputs Qn
Shift register one count pulse ahead of storage register
Input
SHR STR
L
X
X
L
HX
X
H
HH
SHCP STCP
X
X
X
X
↑
X
X
↑
↑
↑
DS
X
X
H or L
X
X
[1] H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH transition;
X = don’t care.
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
V_CC
supply voltage
I_IK
input clamping current
V_I < −0.5 V or V_I > V_CC + 0.5 V
I_OK
output clamping current
V_O < −0.5 V or V_O > V_CC + 0.5 V
I_O
output current
V_O = −0.5 V to V_CC + 0.5 V
Serial data output Q7S
−0.5
+7.0
V
[1] _-
±20
mA
[1] _-
±20
mA
-
±25
mA
Parallel data output
-
±35
mA
I_CC
supply current
Serial data output Q7S
-
50
mA
Parallel data output
-
70
mA
I_GND
ground current
Serial data output Q7S
Parallel data output
-
−50
mA
-
−70
mA
T_stg
storage temperature
P_tot
total power dissipation
T_amb = −40 °C to +125 °C
−65
[2] _-
+150
°C
500
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP16 packages: above 70 °C the value of P_tot derates linearly with 12 mW/K.
For SO16 packages: above 70 °C the value of P_tot derates linearly with 8 mW/K.
For SSOP16 packages: above 60 °C the value of P_tot derates linearly with 5.5 mW/K.
74HC_HCT594_3
Product data sheet
Rev. 03 — 20 December 2006
© NXP B.V. 2006. All rights reserved.
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