74ABT843 Datasheet, PDF (6/14 Pages) NXP Semiconductors – 9-bit interface latch with set and reset 3-State

Philips Semiconductors
9-bit bus interface latch with set and reset
(3-State)
Product specification
74ABT843
AC CHARACTERISTICS
SYMBOL
PARAMETER
WAVEFORM
t_PLH
Propagation delay
t_PHL
Dn to Qn
1
t_PLH
Propagation delay
t_PHL
LE to Qn
2
t_PLH
Propagation delay
t_PHL
PRE to Qn
1
t_PLH
Propagation delay
t_PHL
MR to Qn
1
t_PZH
Output enable time
4
t_PZL
OE to Qn
5
t_PHZ
Output disable time
4
t_PLZ
OE to Qn
5
AC SETUP REQUIREMENTS
GND = 0V, t_R = t_F = 2.5ns, C_L = 50pF, R_L = 500Ω
SYMBOL
PARAMETER
WAVEFORM
t_s(H)
t_s(L)
Setup time, High or Low
Dn to LE
3
t_h(H)
t_h(L)
Hold time, High or Low
Dn to LE
3
t_w(H)
LE pulse width, High
3
t_w(L)
PRE pulse width, Low
6
t_w(L)
MR pulse width, Low
6
t_rec
PRE recovery time
6
t_rec
MR recovery time
6
LIMITS
T_amb = +25^oC
V_CC = +5.0V
Min
Typ
Max
1.6
3.6
5.2
2.2
5.0
6.3
2.0
4.1
5.6
2.8
4.8
6.3
2.2
4.7
6.2
3.0
5.2
6.5
2.5
5.0
6.3
3.1
5.5
6.8
1.0
2.7
4.2
2.0
4.2
5.5
2.9
4.9
6.2
2.2
5.0
6.3
T_amb = -40 to
+85^oC
V_CC = +5.0V ±0.5V
Min
Max
1.6
6.0
2.2
7.2
2.0
6.5
2.8
6.9
2.2
7.4
3.0
7.2
2.5
7.1
3.1
8.0
1.0
5.2
2.0
6.5
2.9
6.8
2.2
6.7
UNIT
ns
ns
ns
ns
ns
ns
LIMITS
T_amb = +25^oC
V_CC = +5.0V
Min
Typ
T_amb = -40 to +85^oC
V_CC = +5.0V ±0.5V
Min
2.5
1.1
2.5
3.0
1.3
3.0
1.0
–1.0
1.0
1.0
–1.0
1.0
3.3
1.8
3.3
4.5
3.0
4.5
5.5
4.0
5.5
2.9
1.6
2.9
3.6
2.0
3.6
UNIT
ns
ns
ns
ns
ns
ns
ns
1998 Jan 16
6