ISP1161A Datasheet, PDF (59/134 Pages) NXP Semiconductors – Full-speed Universal Serial Bus single-chip host and device controller

Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Table 31: HcRhDescriptorB register: bit description…continued
Bit
Symbol Description
15 to 3
-
reserved
2 to 0
DR[2:0]
DeviceRemovable: Each bit is dedicated to a port of the Root
Hub. When cleared, the attached device is removable. When set,
the attached device is not removable.
Bit 0 — reserved
Bit 1 — Device attached to Port #1
Bit 2 — Device attached to Port #2
10.3.3 HcRhStatus register (R/W: 14H/94H)
The HcRhStatus register is divided into two parts. The lower word of a DWORD
represents the Hub Status field and the upper word represents the Hub Status
Change field. Reserved bits should always be written as logic 0.
Code (Hex): 14 — read
Code (Hex): 94 — write
Table 32: HcRhStatus register: bit allocation
Bit
31
30
29
28
27
26
Symbol
CRWE
reserved
Reset
0
0
0
0
0
0
Access
W
R
R
R
R
R
Bit
23
22
21
20
19
18
Symbol
reserved
Reset
0
0
0
0
0
0
Access
R
R
R
R
R
R
Bit
15
14
13
12
11
10
Symbol
DRWE
reserved
Reset
0
0
0
0
0
0
Access
R/W
R
R
R
R
R
Bit
7
6
5
4
3
2
Symbol
reserved
Reset
0
0
0
0
0
0
Access
R
R
R
R
R
R
25
0
R
17
OCIC
0
R/W
9
0
R
1
OCI
0
R
24
0
R
16
LPSC
0
R/W
8
0
R
0
LPS
0
R/W
9397 750 13962
Product data
Rev. 03 — 23 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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