TDA9860 Datasheet, PDF (5/18 Pages) NXP Semiconductors – Universal HiFi audio processor for TV

Philips Semiconductors
Universal HiFi audio processor for TV
Preliminary specification
TDA9860
FUNCTIONAL DESCRIPTION
The TDA9860 consists of the following functions:
• source select switching block
• loudspeaker channel with effect controls
• headphone channel
• two port outputs for general purpose
• I²C-bus control
Source select switching block
The TDA9860 selects and switches the input signals from
three stereo or six mono sources as there are MAIN, AUX
and SCART (Fig.1) to one of the outputs SCART,
loudspeaker and headphone (crossbar-switching Table 3).
Due to the fact, that the main channel (LINE outputs) is
looped outside the circuit (from pins 9 and 24 to pins 10
and 23), signals can be used as LINE output or to insert a
‘surround sound decoder’.
Loudspeaker channel
Volume control is divided into the parts volume 1 and
volume 2 / balance. The first part (55 dB) controls left and
right channels simultaneously; the second part (23 dB)
controls volume and balance of left and right channels
independently. Treble control provides a control range
from −12 to +12 dB and bass control from −12 to +15 dB.
Extended bass control can be provided by an external
T-network (Fig.1) from −15 to +19 dB (2 dB steps).
Effect controls
‘Linear stereo’, ‘stereo with spatial effect (30% or 52%
anti-phase crosstalk)’ and ‘forced mono with or without
pseudo-stereo effect’ are controlled by three bits. A muting
of 85 dB is provided.
Headphone channel
The headphone channel is only equipped with volume /
balance control. A muting of 85 dB is provided.
I²C-bus control
All settings of control are stored in subaddress registers.
Data transmission is simplified by auto-incrementing the
subaddresses. The on-chip power on reset sets the mute
bit to active, so all 3 stereo outputs are muted.
The muting can be switched off by writing a ‘0’ (non-muted)
into the mute control bits.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
V_P
V_n
I_O
P_tot
T_stg
T_amb
V_ESD
supply voltage (pin 6)
voltage on all pins, ground excluded
output current
at pins 15, 18, 13, 20, 7 and 26
at pins 2 and 31
total power dissipation
storage temperature
operating ambient temperature
electrostatic handling for all pins (note 1)
electrostatic handling for all pins (note 2)
Notes to the Limiting Values
1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
2. Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
MIN.
0
0
MAX.
10
V_P
UNIT
V
V
−
2.5
mA
−
1.5
mA
−
850
mW
−25
+150 °C
0
+70
°C
−
±300 V
−
±2000 V
THERMAL RESISTANCE
SYMBOL
R_{th j-a}
PARAMETER
from junction to ambient in free air
July 1994
5
THERMAL RESISTANCE
60 K/W