TDA8366 Datasheet, PDF (5/48 Pages) NXP Semiconductors – I2C-bus controlled PAL/NTSC TV processor

Philips Semiconductors
I²C-bus controlled PAL/NTSC TV
processor
Objective specification
TDA8366
PINNING
SYMBOL
IFDEM1
IFDEM2
DEC_DIG
IFVO
SCL
SDA
DEC_BG
CHROMA
CVBS/Y
V_P1
CVBS_INT
GND1
PIPO
DEC_FT
CVBS_EXT
BLKIN
BO
GO
RO
BCLIN
RI
GI
BI
RGBIN
LUMIN
LUMOUT
BYO
RYO
BYI
RYI
SEC_ref
XTAL1
XTAL2
DET
V_P2
CVBS/TXT
SCO
HOUT
PIN
SDIP52
QFP64
1
11
2
12
3
13
4
14
5
16
6
17
7
18
8
20
9
21
10
22
11
29
12
25
13
27
14
28
15
24
16
30
17
31
18
32
19
33
20
35
21
37
22
38
23
39
24
40
25
42
26
43
27
44
28
45
29
46
30
47
31
48
32
49
33
50
34
52
35
54
36
55
37
56
38
57
DESCRIPTION
IF demodulator tuned circuit 1
IF demodulator tuned circuit 2
decoupling digital supply
IF video output
serial clock input
serial data input/output
bandgap decoupling
chrominance input (S-VHS)
external CVBS/Y input
main supply voltage 1 (+8 V)
internal CVBS input
ground 1
picture-in-picture output
decoupling filter tuning
external CVBS input
black-current input
blue output
green output
red output
beam current limiter input
red input for insertion
green input for insertion
blue input for insertion
RGB insertion input
luminance input
luminance output
(B−Y) signal output
(R−Y) signal output
(B−Y) signal input
(R−Y) signal input
SECAM reference output
3.58 MHz crystal connection
4.43/3.58 MHz crystal connection
loop filter phase detector
horizontal oscillator supply voltage (+8 V)
CVBS/TXT output
sandcastle output
horizontal output
January 1995
5