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TDA4670 Datasheet, PDF (5/16 Pages) NXP Semiconductors – Picture Signal Improvement PSI circuit
Philips Semiconductors
Picture Signal Improvement (PSI) circuit
Product specification
TDA4670
FUNCTIONAL DESCRIPTION
The TDA4670 contains luminance signal processing and
colour-difference signal processing. The luminance signal
section comprises a variable integrated luminance delay
line with luminance signal peaking and noise reduction by
coring.
The colour-difference section consists of a transient
improvement circuit to decrease the rise and fall times of
the colour-difference signal transients. All functions and
parameters are controlled via the I2C-bus.
Y-signal path
The video and blanking signal is AC-coupled to the input
at pin 16. Its black porch is clamped to a DC reference
voltage to ensure the correct operating range of the
luminance delay stage.
The luminance delay line consists of all-pass filter sections
with delay times of 45, 90, 100, 180 and 450 ns
(see Fig.1). The luminance signal delay is controlled via
the I2C-bus in steps of 45 ns in the range of 20 to 1100 ns,
this ensures that the maximum delay difference between
the luminance and colour-difference signals is ±22.5 ns.
An automatic luminance delay time adjustment in an
internal control loop (with the horizontal frequency as a
reference) is used to correct changes in the delay time,
due to component tolerances. The control loop is
automatically enabled between the burst key pulses of
lines 16 (330) and 17 (331) during the vertical blanking
interval. The control voltage is stored in the capacitor CDL
connected to pin 2.
The peaking section uses a transversal filter circuit with
selectable centre frequencies of 2.6 and 5 MHz.
It provides selectable degrees of peaking of −3, 0, +3
and +6 dB and a noise reduction by coring, which
attenuates the high-frequency noise introduced by
peaking.
The output buffer stage ensures a low-ohmic VBS output
signal on pin 12 (<160 Ω). The gain of the luminance
signal path from pin 16 to pin 12 is unity.
An oscillation signal of the delay time control loop is
present on output pin 12 instead of the VBS signal during
the vertical blanking interval in lines 16 (330) to 18 (332).
Therefore, this output signal should not be applied for
synchronization.
Colour-difference signal paths
The colour-difference input signals (on pins 3 and 7) are
clamped to a reference voltage.
Each colour-difference signal is fed to a transient detector
and to an analog signal switch with an attached voltage
storage stage.
The transient detectors consist of differentiators and
full-wave rectifiers. The output voltages of both transient
detectors are added and then compared in a comparator.
This comparator controls both following analog signal
switches simultaneously.
The analog signal switches are in an open position at a
certain value of transient time; the held value (held by
storage capacitors) is then applied to the outputs.
The switches close to rapidly accept the actual signal
levels at the end of these transients. The improved
transient time is approximately 100 ns long and
independent of the input signal transient time.
Colour-difference paths are independent of the input
signal polarity and have a gain of unity.
The CTI functions are switched on and off via the I2C-bus.
1996 Dec 11
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