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TDA1306T Datasheet, PDF (5/24 Pages) NXP Semiconductors – Noise shaping filter DAC
Philips Semiconductors
Noise shaping filter DAC
PINNING
SYMBOL PIN
DESCRIPTION
VDDA
VSSA
TEST1
1 analog supply voltage (+5 V)
2 analog ground
3 test input 1; pin should be connected
to ground
BCK
4 bit clock input
WS
5 word select input
DATA
6 data input
CLKS1
7 clock and format selection 1 input
CLKS2
8 clock and format selection 2 input
VSSD
VDDD
TEST2
9 digital ground
10 digital supply voltage (+5 V)
11 test input 2; pin should be connected
to ground
SYSCLK 12 system clock input 256fs or 384fs
APP3
13 application mode 3 input
APPL
14 application mode selection input
APP2
15 application mode 2 input
APP1
16 application mode 1 input
APP0
17 application mode 0 input
VOL
FILTCL
18 left channel output
19 capacitor for left channel 1st order
filter function; should be connected
between pins 19 and 18
FILTCR
20 capacitor for right channel 1st order
filter function; should be connected
between pins 20 and 21
VOR
Vref
VSSO
VDDO
21 right channel output
22 internal reference voltage for output
channels; 0.5VDDO (typ.)
23 operational amplifier ground
24 operational amplifier supply voltage
Product specification
TDA1306T
Fig.2 Pin configuration.
1998 Jan 06
5