SZA1010 Datasheet, PDF (5/16 Pages) NXP Semiconductors – Digital Servo Driver 3 DSD-3

Philips Semiconductors
Digital Servo Driver 3 (DSD-3)
Preliminary specification
SZA1010
FUNCTIONAL DESCRIPTION
Principle of a class-D digital power driver
Figure 3 shows the block diagram of one of the digital
drivers integrated in the DSD-3. It consists of a timing
block and four CMOS switches. The input signal is a 1-bit
Pulse Density Modulated (PDM) signal, the output of the
digital servo ICs.
The maximum operating clock frequency of the device is
10 MHz. In combination with most frequently used Philips
digital servo ICs, the operating frequency of the digital
drivers is 8.4672 MHz (192 × 44.1 kHz). The sampling
frequency of the 1-bit code however is 2.1168 MHz, so
internally in the DSD-3 the clock speed of the switches will
be 2.1168 MHz.
The higher input clock frequency is used to make
non-overlapping pulses to prevent short-circuits between
the supply voltages. For the control of the switches, two
states can be distinguished. If the 1-bit code contains a
logic 1, switches A and D are closed and current will flow
in the direction as shown in Fig.4.
If the 1-bit code contains a logic 0, switches B and C are
closed and current will flow in the opposite direction, as
shown in Fig.5.
This indicates that the difference between the mean
number of ones and zeros in the PDM signal determines
the direction in which the actuator or motor will rotate.
If the mean number of ones and zeros is equal (Idle mode)
the current through the motor or actuator is alternated
between the positive and negative direction at a speed of
half the sample frequency of 2.1168 MHz. This results in a
high dissipation and the motor does not move.
To improve the efficiency, a digital notch filter is added at
the input of the digital drivers. This filters the Idle mode
pattern (1010101010 etc.) see Fig.6.
The amplitude transfer as a function of frequency is given
in Fig.7.
Figure 7 shows that the filter has a zero on ¹â„₂f_s, thereby
filtering out the Idle pattern (101010). The output of this
filter is a three-level code (1.5-bit). For the control of the
switches three states (1.5-bit) can be distinguished: the
two states as described earlier and a third one. This state
is used when an idling pattern is supplied.
Switches C and D are closed (see Fig.8). In this Idle mode,
no current will flow and thus the efficiency will be improved.
This mode is also used to short-circuit the inductive
actuator/motor. In this way, high induction voltages are
prevented because the current can commutate via the
filter and the short-circuit in the switches. All three drivers
(radial, focus and sledge) contain a digital notch filter as
described (see Fig.6). Each driver has its own power
supply pins to reduce crosstalk due to of the relative high
current flowing through the pins.
Compared to the DSD-2, the DSD-3 has a 3-state mode
for the radial output, which is useful when active damping
of the radial actuator is needed. When fast access times
are required, the sledge has to move with high
accelerations. To prevent the radial actuator from moving
too far from its centre position due to the acceleration,
active damping is applied. In order to measure the
displacement of the radial actuator, the voltage induced by
the actuator itself is measured, which is proportional to its
speed. The damping consists of a sequence of controlling,
waiting, measuring and controlling etc. To be able to
measure the induced voltage properly, the influence of the
DSD-3 is eliminated by switching it into 3-state mode.
1997 Apr 07
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