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SA9504 Datasheet, PDF (5/22 Pages) NXP Semiconductors – Dual-band, PCSCDMA/AMPS LNA and downconverter mixers
Philips Semiconductors
Dual-band, PCS(CDMA)/AMPS
LNA and downconverter mixers
Preliminary specification
SA9504
MODE SELECT LOGIC AND
DC CHARACTERISTICS
The SA9504 chip has several modes of operation for which the
selection logic is defined in the following table. Different mode
selections require different portions of the circuit to be active. Modes
from unlisted combinations of logic pins, are not valid.
POWER-UP PROCEDURE
In order for the SA9504 to function correctly as given in Table 1, the
circuit must be reset on power-up as follows:
To apply a reset, both S0 and S1 should be held HIGH
simultaneously (hold time 100 ns minimum), and then released to a
LOW state upon initially powering up the device.
Table 1. Mode logic definition for LNA and Downconverter mixers
MODES
(Tx) LO
BUFFER
(Tx) LO
BUFFER
OUTPUT
LO FREQ.
DOUBLER
POWER
DOWN1
S0 = S1
LOGIC INPUT PINS
PCS/CEL
LO X2
ENABLE
PCS (CDMA)
1 PCS1
On
2 GHz
Off
0
1
0
2 PCS1 Idle
Off
—
Off
0
1
0
3 PCS2
On
2 GHz
On
0
1
1
4 PCS2 Idle
Off
—
On
0
1
1
Cellular FM
5 FM
On
1 GHz
Off
0
0
0
6 FM Idle
Off
—
Off
0
0
0
Power Down
7
Sleep1
x
x
Off
1
x
x
NOTES:
x = Don’t care
1. The device will be in the Power Down mode (sleep) when both control lines S0 and S1 are held HIGH simultaneously.
(Tx) LO
ENABLE
1
0
1
0
1
0
x
DC CHARACTERISTICS
VCC = 3.3 V; Tamb = +25 °C
SYMBOL
PARAMETER
Power supply
VCC
Supply voltage
ICC
Supply current
all modes
PCS1 mode
PCS1 Idle mode
PCS2 mode
PCS2 Idle mode
FM mode
FM Idle mode
ICC(PD) Supply current in power down
Sleep
Logic inputs (LO_ENABLE, PCS/CEL, S0, S1, LO_X2_EN pins)
VIH
HIGH level input voltage range
VIL
LOW level input voltage range
IIH
HIGH level input bias current
IIL
LOW level input bias current
CONDITIONS
At logic 1
At logic 0
pins at VCC – 0.4 V
pins at 0.4 V
LIMITS
UNIT
MIN
TYP
MAX
2.7
2.85
3.3
V
32.5
37.4
mA
21.9
25.2
mA
36.9
42.4
mA
26.3
30.2
mA
22.3
25.6
mA
11.8
13.8
mA
1
50
µA
0.5VCC
–0.3
–5
–5
VCC+0.3
V
0.2VCC
V
0
5
µA
0
5
µA
1999 Oct 28
5