SA5777A Datasheet, PDF (5/12 Pages) NXP Semiconductors – Dual air-core gauge driver

Philips Semiconductors
Dual air-core gauge driver
Product specification
SA5777A
DC ELECTRICAL CHARACTERISTICS
V_BB = 7.5 to 18 V; V_CC = 4.5 to 5.5 V; T_A = –40 to +85°C.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
MIN
TYP
V_BB
Analog supply voltage
I_IGN
Analog supply current
7.5
V_IGN = 18 V no load
V_BB = 18 V with load
R_C1 = R_C2 = R_LMIN
I_CC
V_OH
V_OL
V_OL Status
I_OH Status
V_IH
V_IL
I_IH
I_IL
A_CC
Logic supply current
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Input high current
Input low current
Output function accuracy²
I_SD
Output shut-down current
V_DRIVE
R_LMIN
Differential coil drive voltage¹
Minimum load resistance
V_CC = 5.5 V
Data out I_OH = 800 µA
Data out I_OL = 1.5 mA
ST, I_OL = 2.5 mA
ST, VO (ST) = V_CC
CS, S_CLK, DATA_IN, OE
CS, S_CLK, DATA_IN, OE
CS, S_CLK, DATA_IN, V_IN = 0.7 x V_CC
CS, S_CLK, DATA_IN, V_IN = 0.3 x V_CC
R_C1 = R_C2 = R_LMIN
C1+, C1–, C2+, C2–, COM
I_SINK
I_SOURCE
V_BB = V_{BB (MAX)}
V_BB = V_{BB (MIN)}
V_BB = V_{BB (MAX)}
V_BB = V_{BB (MIN)}
V_BB = V_{BB (MAX)}
R_L = R_{L (MIN)}
T_A = 85°C
T_A = 25°C
T_A = –40°C
V_CC – 0.8
0.7 x V_CC
85
43
85
43
0.7 x V_BB
215
171
138
V_BIAS
Bias voltage³
IOB (Source or Sink)
R_L = R_{L (MIN)}
0.475 x V_BB
NOTE:
1. V_DRIVE is the maximum voltage that is applied across the coil, it is equal to (C1+) – (C1–) or (C2+) – (C2–).
2. In reference to nominal values in Figure 4. (Based on 7+ bit DAC).
ƪ ƫ ^3.
Output Angle (0) + tan^–1
(C )) – (C–)
V_BB – V_BIAS
MAX
18
30
235
1.0
UNIT
V
mA
mA
0.4
0.8
25
0.3 x V_CC
1
1
±1
V
V
µA
V
V
µA
µA
Degree
500
mA
300
mA
500
mA
300
mA
0.8 x V_BB
V
Ω
Ω
Ω
0.525 x V_BB
V
AC ELECTRICAL CHARACTERISTICS
V_DD = 7.5 to 18 V; V_CC = 4.5 to 5.5 V; T_A = –40 to +85°C
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
MIN
TYP
MAX
FS_CLK
TS_CLKH
TS_CLKL
TRO
TFO
TSU
Input frequency
S_CLK high time
S_CLK low time
Output rise time DO
Output fall time DO
DI set-up time
175
V_CC = 5.5 V
175
0.75 to V_CC –1.2 V, C_L = 90 pF
V_CC –1.2 V to 0.75, C_L = 90 pF
75
1.60
MHz
ns
ns
75
ns
75
ns
ns
THI
DI hold time
75
ns
T_CSH
T_CSL
Time before first S_CLK rising edge
Time after last S_CLK falling edge
75
ns
75
ns
1999 Sep 20
5