PHW80NQ10T Datasheet, PDF (5/7 Pages) NXP Semiconductors – N-channel TrenchMOS transistor

Philips Semiconductors
N-channel TrenchMOS™ transistor
Product specification
PHW80NQ10T
Gate-source voltage, VGS (V)
15
14 ID = 75A
13
12
Tj = 25 C
11
10
9
VDD = 20 V
8
7
6
5
4
3
2
1
0
0 10 20 30 40 50 60 70 80
Gate charge, QG (nC)
VDD = 80 V
90 100 110 120
Fig.13. Typical turn-on gate-charge characteristics
V_GS = f(Q_G)
Source-Drain Diode Current, IF (A)
100
VGS = 0 V
90
80
70
60
175 C
50
Tj = 25 C
40
30
20
10
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
Source-Drain Voltage, VSDS (V)
Fig.14. Typical reverse diode current.
I_F = f(V_SDS); conditions: V_GS = 0 V; parameter T_j
Maximum Avalanche Current, IAS (A)
100
Tj prior to avalanche = 150 C
10
25 C
1
0.001
0.01
0.1
1
10
Avalanche time, tAV (ms)
Fig.15. Maximum permissible non-repetitive
avalanche current (I_AS) versus avalanche time (t_AV);
unclamped inductive load
August 1999
5
Rev 1.000