PHP10N40E Datasheet, PDF (5/7 Pages) NXP Semiconductors – PowerMOS transistors Avalanche energy rated

Philips Semiconductors
PowerMOS transistors
Avalanche energy rated
Product specification
PHP10N60E
Gate-source voltage, VGS (V)
15
14 ID = 10A
13
12
Tj = 25 C
11
200V
10
9
100 V
8
7
VDD=480V
6
5
4
3
2
1
0
0
20
40
60
80
Gate charge, QG (nC)
PHP10N60E
100
120
Fig.13. Typical turn-on gate-charge characteristics.
V_GS = f(Q_G); parameter V_DS
Source-Drain Diode Current, IF (A)
20
PHP10N60E
18
16
14
12
10
8
150 C
Tj = 25 C
6
4
2
0
0
0.2
0.4
0.6
0.8
1
1.2
Drain-Source Voltage, VSDS (V)
Fig.16. Source-Drain diode characteristic.
I_F = f(V_SDS); parameter T_j
Switching times, td(on), tr, td(off), tf (ns)
500
450 ^{VDD = 300V}
RD = 30 Ohms
400
350
300
250
200
150
100
50
0
0
10
20
30
Gate resistance, RG (Ohms)
PHP10N60E
td(off)
tf
tr
td(on)
40
50
Fig.14. Typical switching times; t_d(on), t_r, t_d(off), t_f = f(R_G)
Normalised Drain-source breakdown voltage
1.15
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
1.1
1.05
1
0.95
0.9
0.85
-100
-50
0
50
100
150
Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage;
V_(BR)DSS/V_{(BR)DSS 25 ˚C} = f(T_j)
Non-repetitive Avalanche current, IAS (A)
10
25 C
Tj prior to avalanche = 125 C
1
VDS
ID
0.1
1E-06
tp
PHP10N60E
1E-05
1E-04
1E-03
Avalanche time, tp (s)
1E-02
Fig.17. Maximum permissible non-repetitive
avalanche current (I_AS) versus avalanche time (t_p);
unclamped inductive load
Maximum Repetitive Avalanche Current, IAR (A)
100
10
Tj prior to avalanche = 25 C
125 C
1
0.1
0.01
1E-06
PHP10N60E
1E-05
1E-04
1E-03
Avalanche time, tp (s)
1E-02
Fig.18. Maximum permissible repetitive avalanche
current (I_AR) versus avalanche time (t_p)
December 1998
5
Rev 1.000