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BUK9K6R2-40E_15 Datasheet, PDF (5/13 Pages) NXP Semiconductors – Dual N-channel TrenchMOS logic level FET
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NXP Semiconductors
BUK9K6R2-40E
Dual N-channel TrenchMOS logic level FET
Symbol
Rth(j-a)
Parameter
thermal resistance
from junction to
ambient
Conditions
Minimum footprint; mounted on a
printed circuit board
Min Typ Max Unit
-
95
-
K/W
10
003aaj584
Zth(j-mb)
(K/W)
1
10-1
δ = 0.5
0.2
0.1
0.05
0.02
10-2
single shot
P
δ=
tp
T
10-3
10-6
10-5
10-4
10-3
10-2
tp
t
T
10-1
tp (s)
1
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Static characteristics FET1 and FET2
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;
voltage
Fig. 10; Fig. 11
ID = 1 mA; VDS = VGS; Tj = 175 °C;
Fig. 10; Fig. 11
ID = 1 mA; VDS = VGS; Tj = -55 °C;
Fig. 10; Fig. 11
IDSS
drain leakage current VDS = 40 V; VGS = 0 V; Tj = 175 °C
VDS = 40 V; VGS = 0 V; Tj = 25 °C
IGSS
gate leakage current VGS = -10 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; VDS = 0 V; Tj = 25 °C
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 20 A; Tj = 25 °C; Fig. 12
VGS = 5 V; ID = 20 A; Tj = 175 °C;
Fig. 12; Fig. 13
BUK9K6R2-40E
Product data sheet
All information provided in this document is subject to legal disclaimers.
23 April 2013
Min Typ Max Unit
36
-
-
V
40
-
-
V
1.4 1.7 2.1 V
0.5 -
-
V
-
-
2.45 V
-
-
500 µA
-
0.02 1
µA
-
2
100 nA
-
2
100 nA
-
5.27 6.2 mΩ
-
10.2 12.5 mΩ
© NXP B.V. 2013. All rights reserved
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